CY7C09169 Search Results

A12L

Abstract: A13L CY7C09159V CY7C09169V
Contextual Info: fax id: 5208 CYPRESS CY7C09159V CY7C09169V PRELIMINARY 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM • H ig h-speed clo ck to d ata ac ce ss 7.5/12 ns m ax. Features • 3.3V Low o p e ratin g p ow er • True D u al-P o rted m e m o ry cells w h ich allo w sim u lta­

CY7C09159V

Abstract: CY7C09169V
Contextual Info: fax id: 5208 51 CY7C09159V CY7C09169V PRELIMINARY 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 2 Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159V

Contextual Info: CY7C09169AVTITLE CY7C09159AV CY7C09169AV 3.3 V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location ■ Two Flow-through/Pipelined devices ❐ 8K x 9 organization CY7C09159AV

Contextual Info: fax id: 5208 CYPRESS CY7C09159V CY7C09169V ADVANCED INFORMATION 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • High-speed clock to data access 10/12 ns max. • 3.3V Low operating power — Active= 135 mA (typical) • True Dual-Ported memory cells which allow simulta­

A12L

Abstract: A13L CY7C09159AV CY7C09169AV
Contextual Info: CY7C09159AV CY7C09169AV3.3V 8K/16K x 9 Synchronous Dual Port Static RAM CY7C09159AV CY7C09169AV 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • 3.3V Low operating power • True Dual-Ported memory cells which allow simultaneous access of the same memory location

A12L

Abstract: A13L CY7C09159 CY7C09169 HC 1815 FCD2
Contextual Info: fax id: 521 8 CYPRESS CY7C09159 CY7C09169 PRELIMINARY 8K/16K x 9 Synchronous Dual-Port Static RAM • H ig h-speed clo ck to d ata ac ce ss 6 .5 /7 .5 /1 2 ns m ax. Features • Low o p e ratin g p o w er • True D u al-P o rted m e m o ry cells w h ich allo w sim u lta­

A12L

Abstract: A13L CY7C09159 CY7C09169
Contextual Info: 1 CY7C09159 CY7C09169 PRELIMINARY 8K/16K x 9 Synchronous Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159

Contextual Info: 25/0251 CY7C09159A CY7C09169A 8K/16K x 9 Synchronous Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159A — 16K x 9 organization (CY7C09169A)

A12L

Abstract: A13L CY7C09159AV CY7C09169AV
Contextual Info: 1 CY7C09159AV CY7C09169AV PRELIMINARY 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159AV

Contextual Info: 25/0251 CY7C09159AV CY7C09169AV 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159AV

A12L

Abstract: A13L CY7C09159A CY7C09169A
Contextual Info: 1 CY7C09159A CY7C09169A PRELIMINARY 8K/16K x 9 Synchronous Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159A

A12L

Abstract: A13L CY7C09159A CY7C09169A
Contextual Info: 25/0251 CY7C09159A CY7C09169A 8K/16K x 9 Synchronous Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159A — 16K x 9 organization (CY7C09169A)

A12L

Abstract: A13L CY7C09159V CY7C09169V
Contextual Info: 1 CY7C09159V CY7C09169V PRELIMINARY 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159V

CY7C09159

Abstract: CY7C09169
Contextual Info: fax id: 5218 51 CY7C09159 CY7C09169 PRELIMINARY 8K/16K x 9 Synchronous Dual-Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 2 Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159

Contextual Info: CY7C09169AVTITLE CY7C09159AV 3.3-V 8 K x 9 Synchronous Dual Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location ■ Flow-through/Pipelined device ❐ 8 K × 9 organization CY7C09159AV ■

Contextual Info: fax id: 5218 CYPRESS ADVANCED INFORMATION CY7C09159 CY7C09169 8K/16K x 9 Synchronous Dual Port Static RAM • High-speed clock to data access 8/10/12 ns max. • Low operating power — Active= 200 mA (typical) Features True Dual-Ported memory cells which allow simulta­

A12L

Abstract: A13L CY7C09159AV CY7C09169AV
Contextual Info: 25/0251 CY7C09159AV CY7C09169AV 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159AV

CY7C09159

Abstract: CY7C09169 Micron
Contextual Info: fax id: 5218 51 CY7C09159 CY7C09169 ADVANCED INFORMATION 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 2 Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159

A12L

Abstract: A13L CY7C09159 CY7C09169 AN 5218
Contextual Info: fax id: 5218 51 CY7C09159 CY7C09169 PRELIMINARY 8K/16K x 9 Synchronous Dual-Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 2 Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159

A12L

Abstract: A13L CY7C09159A CY7C09169A
Contextual Info: 25/0251 CY7C09159A CY7C09169A 8K/16K x 9 Synchronous Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159A — 16K x 9 organization (CY7C09169A)

Contextual Info: CY7C09159AV CY7C09169AV3.3V 8K/16K x 9 Synchronous Dual Port Static RAM CY7C09159AV CY7C09169AV 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • 3.3V Low operating power • True Dual-Ported memory cells which allow simultaneous access of the same memory location

Contextual Info: CY7C09169AVTITLE CY7C09159AV 3.3-V 8 K x 9 Synchronous Dual Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location ■ Flow-through/Pipelined device ❐ 8 K × 9 organization CY7C09159AV ■

A12L

Abstract: A13L CY7C09159V CY7C09169V
Contextual Info: fax id: 5208 51 CY7C09159V CY7C09169V PRELIMINARY 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 2 Flow-Through/Pipelined devices — 8K x 9 organization CY7C09159V

Contextual Info: fax id: 5208 CY7C09159V CY7C09169V :/ C Y P R E S S 3.3V 8K/16K x 9 Synchronous Dual Port Static RAM • High-speed clock to data access 7.5/12 ns max. • 3.3V Low operating power Features • True Dual-Ported m em ory cells which allow simulta­ neous access of the same memory location