CURRENT131 Search Results

Contextual Info: SMCJ6.0C Diodes Bidirectional Transient Suppressor Military/High-RelN Minimum Operating Temp øC Maximum Operating Temp (øC) V(BR) Nom.(V)Rev.Break.Voltage7.41 @I(R) (A) (Test Condition)10m V(RWM) (V) Work.Pk.Rev.Voltage6.0 I(PPM) Max.(A)Pk.Pulse Current131

Contextual Info: SMCJ6.0 Diodes Unidirectional Transient Suppressor Military/High-RelN Minimum Operating Temp øC Maximum Operating Temp (øC) V(BR) Nom.(V)Rev.Break.Voltage7.41 @I(R) (A) (Test Condition)10m V(RWM) (V) Work.Pk.Rev.Voltage6.0 I(PPM) Max.(A)Pk.Pulse Current131

Contextual Info: HSMCJ6.0 Diodes Unidirectional Transient Suppressor Military/High-RelN Minimum Operating Temp øC Maximum Operating Temp (øC) V(BR) Nom.(V)Rev.Break.Voltage @I(R) (A) (Test Condition)10m V(RWM) (V) Work.Pk.Rev.Voltage6.0 I(PPM) Max.(A)Pk.Pulse Current131

Contextual Info: HEWLETT-PACKARD/ CMPNTS 3 ME D • 44475Ô4 m DÜG75bb 1 «HPA HEW LETT PACKARD T - ^ h Z .3 Subminiature Solid State Lamps Technical Data Features Dome Packages The HLMP-6XXX Series dome lamps for use as indicators use a tinted, diffused lens to provide a

d1ye

Contextual Info: T hat H E W L E T T mLUM PA C K A R D 2 mm x 5 mm Rectangular LED Lamps HLMP-S100 HLMP-S201 Technical Data Features SiKSXi HLMP-S40X Series HLMP-S501 HLMP-S600 HLMP-S201-D0000 HLMP-S301-B0000 HLMP-S501-C0000 Package D im ensions • Rectangular Light Emitting

Contextual Info: LSI LOGIC L64281 FFT Video Shift Register FFTSR Preliminary General Description The L64281 is a high-speed Fast Fourier Trans­ form (FFT) video shift register. It is used to per­ form data formatting in real-time FFT systems using the L64280 Fast Fourier Transform Pro­

Contextual Info: L64212 Variable-Length Video Shift Register HVSR Description ^ S I LOGIC. The L64212 is a high-speed variable-length video shift register. This device can be used individually or as video line delays for the L64200 family of processors. The delay of the

QS3389

Contextual Info: QS3389 PRELIMINARY Last Value Latch 20 Active Bus Terminators Bus Hold QS3389 FEATURES/BENEFITS • • • • • Active termination pulls bus pins to rails Holds last value of input signal Ideal replacement for resistive termination Ultra low 3 [xA DC quiescent current

C495

Abstract: ClD71A CLD71 CLD72 CLD71-A
Contextual Info: 34^730 MOE D FASCO INDS/ SENISYS GDDiata 1 ».'SENI B C H z a ia i CLD71/CLD72 Silicon Planar Photodiodes CLD71 - TOP V IE V CLD72 - TOP V IE V THE ANODE OF 'V ' VERSIONS IS IDENTIFIED BY A COLOR DOT ALL DIMENSIONS ARE IN INCHES MILLIMETERS] „ r *' V.W., C2.031

d0147

Abstract: doo47 DI45 L64281
Contextual Info: LSI LOGIC L64281 FFT Video Shift Register FFTSR General Description The L64281 is a high-speed FFT (Fast Fourier Transform) video shift register. It is used to per­ form data formatting in real-time FFT systems using the L64280 FFTP (Fast Fourier Transform

RT 8209

Abstract: P8205 JIS P8115 800 8506
Contextual Info: ¥mhüHpM\ HEWLETT PACKARD T-13/4 Super Ultra-Bright LED Lamps Technical Data Features • V ery H igh In te n sity • N arro w a n d M edium V iew ing A ngles • U n tin te d , N o ndiffused L ens • C hoice o f F ive C olors • S tu rd y L ead s w ith S ea tin g

20ra10z

Contextual Info: EEPLD M20RA10Z November 1989 PRELIMINARY DATA SHEET Features • CMOS EEPLD with Zero Standby Power: • 10 pA Typical, 150 pA Maximum ■ Quickly and Easily Reprogrammable in All Package Types ■ Operating Power Rises at Less Than 5 m A/MHz 100 Reprogramming Cycles, Minimum

V = Device Code

Contextual Info: IIIIICRTRLY5T mUM H Prelim inary S E M I C O N D U C T O R CAT33C804A-B/CAT33C804A-BI 4K-Bit SECURE ACCESS SERIAL E2PROM FEATURES • Low Power CMOS Technology 100,000 Program/Erase Cycles ■ 3V Operation I/O Speed: 9600 Baud -CAT33C804A: 4.9152 M H zXtal

tnar 3-a

Contextual Info: _ CY7C150 SEMICONDUCTOR 1024 x 4 Static R/W RAM ployed, with only selected devices being cleared at any given time. F eatu res F u n ctio n al D escrip tio n • M em ory reset function The CY7C150 is a high-performance CMOS static RAM designed for use in

SEEQ EDLC

Abstract: wack 83c90
Contextual Info: 83C90 E D LC Ethernet Data Link Controller Technology, Incorporated PRELIMINARY July 1992 Features • Pin & Function Compatible with National Soml 8390 NIC ■ ■ ■ Lower power CMOS process with single 5 V supply General Description Support IEEE 802.3, Thin Ethernet, and StarLAN

Contextual Info: Whiffl HEWLETT mLUM PACKARD 2 mm x 5 mm Rectangular LED Lamps Technical Data HLMP-S100 HLMP-S20X Series HLMP-S30X Series HLMP-S40X Series HLMP-S50X Series HLMP-S600 F eatures Package D im ensions • Rectangular Light Emitting Surface • Excellent for Flush

Contextual Info: W mL'hol EM HP AECWK AI TRTD T-l3/4 5 mm High Performance TS AlGaAs Red LED Lamps Technical Data HLMP-810X Series HLMP-C100 HLMP-C110 Features • Exceptional Brightness • Outstanding LED Material Efficiency • High Light Output Over a Wide Range of Drive

CEJ65

Contextual Info: minim M 65898/M 65899 d a ta s h e e t 65,536 x 4 STATIC RAM DESCRIPTION . . . LOW STANDBY POWER 165 mW . TTL-COMPATIBLE INPUTS AND OUTPUTS . CAPABLE OF WITH STANDING GREATER THAN 2001 V ELECTROSTATIC DISCHARGE . OUTPUT ENABLE FEATURE OE (M-65899 ONLY) BICMOS FOR OPTIMUM SPEED/POWER

PSA B20 0110

Abstract: Sun UltraSparc T1 UltraSPARC ii ultrasparc
Contextual Info: S un M icro electro nics Ju ly 1997 U ltr a S P A R C DATA SHEET -!! Second Generation SPARC v9 64-Bit Microprocessor With VIS D e s c r ip t io n The STP1031, U ltraSPA R C -II, is a high-perform ance, highly-integrated superscalar processor im plem enting

Contextual Info: f ì j PERICOM PI6B3904 Low Skew 1:6 Clock Driver Mi i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i Product Description: Product Features: • • • • • • • Six low skew outputs: 0.35 ns typ.

Contextual Info: KM75C02A CMOS FIFO First-in First-out FIFOj 1024 x 9 CMOS Memory FEATURES DESCRIPTION • First-in, First-out dual port memory — 1024 x 9 organization • Very high speed independent of depth/width — 25ns cycle times • Asynchronous and simultaneous read and write

Contextual Info: seeo EEPLD M20RA10Z PRELIMINARY DATA SHEET November 1989 Features CMOS EEPLD with Zero Standby Power: • 10 pA Typical, 150 pA Maximum m Quickly and Easily Reprogrammable in All • Operating Power Rises at Less W an 5 mA/MHz ■ 100 Reprogramming Cycles, Minimum

Contextual Info: KM75C02A CMOS FIFO First-in First-out FIFO 1024x9 CMOS Memory FEATURES DESCRIPTION • F irst-in, F irs t-o u t dual p o rt m em ory — 1024 x 9 organization • Very high speed independent o f de p th /w id th — 20 ns cycle tim es • Asynchronous and sim ultaneous read and w rite

Contextual Info: ¡R samsung * 0 Semiconductor KM75C102A CMOS FIFO WITH PROGRAMMABLE FLAG Preliminary FEATURES DESCRIPTION • Flrst-lrvFlrst-Out Dual Port Memory — 1Kx9 The 75C102A is a 1K x 9 dual port memory that imple­ ments a special First-In-First-Out FIFO algorithm that