1024X9 Search Results
1024X9 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
|
Contextual Info: SN74ACT2235 1024x9x2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS148E - DECEMBER 1990 - REVISED APRIL 1998 • Independent Asynchronous Inputs and Outputs • Access Times of 25 ns With a 50-pF Load • Data Rates up to 50 MHz • Low-Power Advanced CMOS Technology |
OCR Scan |
sn74act22351024x9x2scas148e50-pf+2 | |
|
Contextual Info: 67C4502-35/50/65/80 a Deep First-in First-out FIFO 1024x9 C M O S Memory o> O .u cn DISTINCTIVE CHARACTERISTICS M Retransmit capability Expandable in both width an djtepth Increased noise immunity for XI • CMOS threshold Functional and pin compatible with industry |
OCR Scan |
67c4502-35/50/65/801024x967c4502 | |
|
Contextual Info: 57C4502-50/65/80 High Density First-in First-out FIFO 1024x9 CMOS Memory cn ~>l O Advance Information DISTINCTIVE CHARACTERISTICS RAM based FIFO 1024x9 organization Cycle times of 65/80/100 nanoseconds Asynchronous and simultaneous writes and reads Low power consumption - 80 mA maximum |
OCR Scan |
57c4502-50/65/801024x957c4502 | |
AM7202Contextual Info: A d v a n c e In f o r m a t i o n Advanced Micro Devices Am7202-40/50/65/80 High Density First-in First-out FIFO 1024x9 CM O S Memory DISTINCTIVE CHARACTERISTICS • RAM based FIFO Status flags - full, half-full, empty • 1024x9 organization Retransmit capability |
OCR Scan |
am7202-40/50/65/801024x9am7202 | |
Z/tda 7281Contextual Info: CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9, DUAL 1024x9 IDT7280 IDT7281 IDT7282 PRELIMINARY INFORMATION FEATURES: • • • • • • • • • • • • The 7280 is equivalent to tw o 7200 256x9 FIFOs The 7281 is equivalent to tw o 7201 512x9 FIFOs |
OCR Scan |
1024x9idt7280idt7281idt7282+6 | |
AM7202
Abstract: am7202-25
|
OCR Scan |
am7202-25/35/50/65/801024x91024x9-bitam7202+1 | |
|
Contextual Info: 2048x 9-BitRFO- Radiation Hardened 7203ERP CMOS epi Parallel Cascadeable FIFO DATA INPUTS ‘ D O -0 8 For Space Applications Ü WRITE POINTER s . RAM ARRAY 512x9 1024x9 2040x9 K= READ POINTER UJ-L1I I,I THREE El's 7 2 0 3 ERP (RP for STATE BUFFERS RAD-PAK ) high speed |
OCR Scan |
2048x7203erp512x91024x9+3 | |
|
Contextual Info: KM75C02A CMOS FIFO First-in First-out FIFO 1024x9 CMOS Memory FEATURES DESCRIPTION • F irst-in, F irs t-o u t dual p o rt m em ory — 1024 x 9 organization • Very high speed independent o f de p th /w id th — 20 ns cycle tim es • Asynchronous and sim ultaneous read and w rite |
OCR Scan |
km75c02a1024x9 | |
|
Contextual Info: DALLAS SEMICONDUCTOR DS2010 1024x9 FIFO Chip PIN ASSIGNMENT FEATURES • First-in, first-out memory-based architecture W C 1* 28 □ V C C 27 □ D4 • Flexible 1024 x 9 organization D SC 2 D3C 3 • Low-power HCMOS technology D 2Ü 4 24 • Asychronous and simultaneous read/write |
OCR Scan |
120nsds20101024x9ds2009+2 | |
d1607
Abstract: S2010
|
OCR Scan |
s2010120nsds20101024x9+3 | |
|
Contextual Info: VIT EL IC CORP Tö VITELIC ¿'Ëj 1SD531D □□□□35b .0 | T-V6-35 PRELIMINARY V61C03 FAMILY HIGH PERFORMANCE LOW POWER 1024x9 CMOS PARALLEL FIFO MEMORY Features I • Specifications are the same as V61C01/02 except as listed. ■ First-In/First-Out Memory |
OCR Scan |
1sd531dt-v6-35v61c031024x9+1 | |
|
Contextual Info: 67C4502-35/50/65/80 a Deep First-in First-out FIFO 1024x9 CMOS Memory Oi O cn to 1 DISTINCTIVE CHARACTERISTICS w U) Dì Retransmit capability Expandable in both width and depth Increased noise immunity for XI - CMOS threshold RAM based FIFO 1024x9 organization |
OCR Scan |
67c4502-35/50/65/801024x967c4502 | |
|
Contextual Info: european space agency agence spatiale européenne Pages 1 to 66 INTEGRATED CIRCUITS, SILICON MONOLITHIC, CMOS SILICON GATE, STATIC 9K 1024x9 BIT FIRST IN, FIRST OUT MEMORY WITH 3-STATE OUTPUTS, BASED ON TYPE M67202FV ESA/SCC Detail Specification No. 9301/032 |
OCR Scan |
1024x9m67202fvckbd-000 | |
low power fifo
Abstract: OOLB
|
OCR Scan |
2s771512x91024x92048x9+5 | |
|
|
|||
|
Contextual Info: 67C4502-35/50/65/80 Deep First-in First-out FIFO 1024x9 CMOS Memory a s DISTINCTIVE CHARACTERISTICS RAM based FIFO 1024x9 organization Cycle tim es of 45/65/80/100 nanoseconds Asynchronous and simultaneous writes and reads Retransmit capability Expandable in both width andjtepth |
OCR Scan |
67c4502-35/50/65/801024x967c4502 | |
|
Contextual Info: 67C4502-35/50/65/80 Deep First-in First-out FIFO 1024x9 C M O S Memory a o> -vl O 4* in DISTINCTIVE CHARACTERISTICS o in Retransmit capability Expandable in both width and depth Increased noise immunity for XI • CMOS threshold Functional and pin compatible with industry |
OCR Scan |
67c4502-35/50/65/801024x967c4502 | |
D426Contextual Info: Advanced Micro Devices Am7202A High Density First-In First-Out FIFO 1024x9-Bit CMOS Memory DISTINCTIVE CHARACTERISTICS • ■ ■ RAM based FIFO 1024x9 organization ■ Cycle times of 40/65 nanoseconds for APL products Asynchronous and simultaneous writes |
OCR Scan |
am7202a1024x9-bit1024x94430-016a+1 | |
|
Contextual Info: 67C4502-35/50/65/80 Deep First-in First-out FIFO 1024x9 C M O S Memory a o> O .u cn DISTINCTIVE CHARACTERISTICS Retransmit capability Expandable in both width an djtepth Increased noise immunity for XI • CMOS threshold Functional and pin compatible with industry |
OCR Scan |
67c4502-35/50/65/801024x967c4502 | |
high level block diagram for asynchronous FIFO
Abstract: DIP28-W-300 LH540202 LJH540202
|
OCR Scan |
lh540202lh5497arrvidt/ms7202lh5497h+7 | |
|
Contextual Info: 3.3 VOLT DUAL CMOS SyncFlFO DUAL 256 x 9, DUAL 512 x 9, DUAL 1,024 x 9, DUAL 2,048 x 9, DUAL 4,096 x 9 Integrated D ev ice TechnoJogy, S c . FEATURES: • The IDT72V801 is equivalent to two IDT72V201 256 x 9 FIFOs • The IDT72V811 is equivalent to two IDT72V211 5 1 2 x 9 FIFOs |
OCR Scan |
idt72v801idt72v201idt72v811idt72v211+6 | |
|
Contextual Info: BUS-MATCHING BIDIRECTIONAL FIFO 512 x 1 8 -B IT -1024 x 9-BIT 1024 x 18-BIT - 2048 x 9-BIT Integrated D evice Technology, Inc. IDT72510 IDT72520 FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18-Bit - 1024 x 9-Bit IDT72510 |
OCR Scan |
18-bitidt72510idt7252018-to-9-bit+1 | |
|
Contextual Info: 3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO IDT72V81 DUAL 512 X 9, DUAL 1024 x 9 IDT72V82 PRELIMINARY INFORMATION Integrated Device Technology, Inc. FEATURES: single package with all associated control, data, and flag lines assigned to separate pins. The devices use Full and Empty |
OCR Scan |
idt72v81idt72v822s771d027n3+4 | |
CY7C428-65PC
Abstract: CY7C419 CY7C421 CY7C425 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202 IDT7203
|
OCR Scan |
cy7c419/21/25/29/33cy7c419cy7c421cy7c425+9 | |
LCMXO2-1200HC-4TG100C
Abstract: LCMXO2-256HC-4TG100I LCMXO2-1200 tn1200 lcmxo2 LCMXO2-1200HC-4TG100 LCMXO2-2000 LCMXO2-7000 MachXO2-1200 LCMXO2-4000HC
|
Original |
hb1010lcmxo2-1200hc-4tg100clcmxo2-256hc-4tg100ilcmxo2-1200+7 | |