CS18LV Search Results

CS18LV00645

Abstract: CS18 CS18LV
Contextual Info: High Speed Super Low Power SRAM CS18LV00645 8K-Word By 8 Bit Revision History Rev. No. History Issue Date 1.0 Initial Issue Dec.17,2004 1.1 Update the WRITE CYCLE1 Write Enable Controlled waveform Mar.29,2005 1.2 Add 55ns spec. Apr. 13,2006 1.3 Add ICCSB characteristic in page 6

CS18LV

Abstract: 8X13 CS18LV10245 CS18LV10245CC CS18LV10245CI CS18LV10245DC CS18LV10245DI CS18LV10245EC CS18LV10245EI CS18LV10245LC
Contextual Info: High Speed Super Low Power SRAM CS18LV10245 128K-Word By 8 Bit „ DESCRIPTION The CS18LV10245 is a high performance, high speed and super low power CMOS Static Random Access Memory organized as 131,072 words by 8bits and operates from a wide range of 4.5 to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high

Contextual Info: High Speed Super Low Power SRAM CS18LV02563 32K-Word By 8 Bit „ DESCRIPTION The CS18LV02563 is a high performance, high speed and super low power CMOS Static Random Access Memory organized as 32,768 words by 8bits and operates from a wide range of 1.8 to 3.6V supply voltage. Advanced CMOS technology and circuit techniques provide both high

Contextual Info: High Speed Super Low Power SRAM 512K Words By 8 Bit CS18LV40965 Revision History Rev. No. 2.0 History Issue Date Initial issue Dec. 13, 2007 1 Chiplus reserves the right to change product or specification without notice. Rev. 2.0 High Speed Super Low Power SRAM

Contextual Info: High Speed Super Low Power SRAM 512K Words By 8 Bit CS18LV40965 Revision History Rev. No. History Issue Date 2.0 Initial issue Dec. 13, 2007 2.1 Revise DC characteristics Feb. 18, 2008 2.2 Revise DC characteristics Apr. 03, 2008 1 Chiplus reserves the right to change product or specification without notice.

CS18LV00645

Contextual Info: High Speed Super Low Power SRAM CS18LV00645 8K-Word By 8 Bit Revision History Rev. No. 1.0 History Initial Issue Issue Date Dec.17,2004 Remark 1 Chiplus reserves the right to change product or specification without notice. Rev. 1.0 High Speed Super Low Power SRAM

CS18LV20483

Contextual Info: High Speed Super Low Power SRAM 256K-Word By 8 Bit CS18LV20483 Revision History Rev. No. 1.0 History Initial issue 1 Issue Date Jan.26,2005 Remark Rev. 1.0 Chiplus reserves the right to change product or specification without notice. High Speed Super Low Power SRAM

CS18LV10245

Contextual Info: High Speed Super Low Power SRAM 128K Word By 8 Bit CS18LV10245 Revision History Rev. No. 1.0 1.1 1.2 1.3 History New Issue Add a new 32L WSON-8x8mm package Revise ICCSB1 Typ Remove WSON 1 Issue Date Jun.29, 2005 Aug.12, 2005 Apr. 07,2006 June.12.2006 Remark

CS18LV20483

Contextual Info: High Speed Super Low Power SRAM 256K Word By 8 Bit CS18LV20483 Revision History Rev. No. 1.0 1.1 1.2 1.3 History Initial issue Revise ICCSB1 Add a new 32L WSON-8x8mm package Remove WSON-8*8mm Package 1 Issue Date Jan.26, 2005 Apr. 22. 2005 Aug.12, 2005 June.12.2006

1A High-Speed Buffer

Abstract: CS18LV0256 CS18LV02565
Contextual Info: High Speed Super Low Power SRAM 32K-Word By 8 Bit CS18LV02565 Revision History Rev. No. 2.0 History Initial issue with new naming rule 1 Issue Date Dec.29,2004 Remark Rev. 2.0 Chiplus reserves the right to change product or specification without notice. High Speed Super Low Power SRAM

Contextual Info: High Speed Super Low Power SRAM 256K Word By 8 Bit CS18LV20483 Revision History Rev. No. 1.0 1.1 1.2 History Initial issue Revise ICCSB1 Add a new 32L WSON-8x8mm package 1 Issue Date Jan.26, 2005 Apr. 22. 2005 Aug.12, 2005 Rev. 1.2 Chiplus reserves the right to change product or specification without notice.

Contextual Info: High Speed Super Low Power SRAM CS18LV10245 128K-Word By 8 Bit Revision History Rev. No. 1.0 History New Issue Issue Date Jun.29, 2005 1 Remark Rev. 1.0 Chiplus reserves the right to change product or specification without notice. High Speed Super Low Power SRAM

Contextual Info: High Speed Super Low Power SRAM 256K-Word By 8 Bit CS18LV20483 Revision History Rev. No. 1.0 1.1 History Initial issue Issue Date Jan.26,2005 Revise ICCSB1 Apr. 22.2005 1 Remark Rev. 1.1 Chiplus reserves the right to change product or specification without notice.

Contextual Info: High Speed Super Low Power SRAM CS18LV10243 128K-Word By 8 Bit „ DESCRIPTION The CS18LV10243 is a high performance; high speed and super low power CMOS Static Random Access Memory organized as 131,072 words by 8bits and operates from a wide range of 2.7 to 3.6V supply

Contextual Info: High Speed Super Low Power SRAM 512K Word By 8 Bit CS18LV41963 Revision History Rev. No. 1.0 History Initial issue 1 Issue Date Dec.28, 2005 Rev. 1.0 Chiplus reserves the right to change product or specification without notice. High Speed Super Low Power SRAM

cs18lv02560a

Contextual Info: High Speed Super Low Power SRAM CS18LV02560 32K-Word By 8 Bit DESCRIPTION The CS18LV02560 is a high performance; high speed and super low power CMOS Static Random Access Memory organized as 32,768 words by 8bits and operates from a wide range of 2.2 to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high

CS18LV02563

Contextual Info: High Speed Super Low Power SRAM 32K-Word By 8 Bit CS18LV02563 Revision History Rev. No. 2.0 History Initial issue with new naming rule 1 Issue Date Dec.27,2004 Remark Rev. 2.0 Chiplus reserves the right to change product or specification without notice. High Speed Super Low Power SRAM

CS18LV40963CI

Abstract: CS18LV40963D
Contextual Info: High Speed Super Low Power SRAM 512k word x 8 bit CS18LV40963 „ DESCRIPTION The CS18LV40963 is a high performance, high speed, low power CMOS Static Random Access Memory organized as 524,288 words by 8 bits and operates from a wide range of 2.7 to 3.6V supply voltage. Advanced CMOS technology and circuit techniques

Contextual Info: High Speed Super Low Power SRAM 32K Word x 8 Bit CS18LV02563 Revision History Rev. No. 2.0 History Initial issue with new naming rule 1 Issue Date Dec.27,2004 Remark Rev. 2.0 Chiplus reserves the right to change product or specification without notice. High Speed Super Low Power SRAM

CS18LV10243

Abstract: Chiplus
Contextual Info: High Speed Super Low Power SRAM CS18LV10243 128K Word x 8 Bit Revision History Rev. No. 2.0 2.1 History Initial issue with new naming rule Add a new 32L WSON-8x8x0.75mm package 1 Issue Date Jan.10, 2005 Aug.12, 2005 Rev. 2.1 Chiplus reserves the right to change product or specification without notice.

CS18LV02565

Contextual Info: High Speed Super Low Power SRAM 32K-Word By 8 Bit CS18LV02565 Revision History Rev. No. 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 History Initial issue with new naming rule Update the WRITE CYCLE1 Write Enable Controlled waveform Revise VIL from 1.5V to 0.8V Revise VIH, VOH, IOL, ICC, ICCSB, ICCSB1, VDR, ICCDR, tDW

CS18LV81923

Abstract: 850C
Contextual Info: High Speed Super Low Power SRAM 1M Words By 8 bit CS18LV81923 Revision History Rev. No. 2.0 History Issue Date Initial issue 2007/08/23 1 Rev. 2.0 Chiplus reserves the right to change product or specification without notice. High Speed Super Low Power SRAM

Contextual Info: High Speed Super Low Power SRAM 128K Word By 8 Bit CS18LV10245 Revision History Rev. No. 1.0 1.1 1.2 1.3 History New Issue Add a new 32L WSON-8x8mm package Revise ICCSB1 Typ Remove WSON 1 Issue Date Jun.29, 2005 Aug.12, 2005 Apr. 07,2006 June.12.2006 Remark

Contextual Info: High Speed Super Low Power SRAM CS18LV00645 8K-Word By 8 Bit Revision History Rev. No. 1.0 1.1 1.2 History Initial Issue Update the WRITE CYCLE1 Write Enable Controlled waveform Add 55ns spec. Issue Date Dec.17,2004 Mar.29,2005 Apr. 13,2006 1 Chiplus reserves the right to change product or specification without notice.