CQ 818 Search Results

Contextual Info: LOW-DROPOUT REGULATORS — HIGH EFFICIENCY A8188SLU-XX O CQ D W 1 2 3 Û z CÛ ID CD CO LU LU < LU Dwg. P S -0 21-2 where “-xx" is the required output voltagefc|iWft8&, ABSOLUTE MAXIMUM RATINGS 10 V Input V oltage,^ . Peak Output'dttrrent EnabJ%lri'p|^ôltaget VE^

MN5282

Abstract: MN373H MN373
Contextual Info: MN373 Iu LOW-COST HIGH-RESOLUTION TRACK-HOLD AMPLIFIER M ICR O N E T W O R K S DESCRIPTION FEATURES • Low C ost • C o m p a tib le w ith All D IP P ackaged 14-16 B it A /D ’s 10/tsec M ax A cq uisition T im e 10V S tep to ± 0 .0 0 3 % Specification

Contextual Info: Preliminary GS8182S18D-250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS8182S18D-250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

8180D18

Abstract: GS8180D18B GS8180D18B-300 GS8180D18B-333
Contextual Info: Preliminary GS8180D18B-333/300/250 18Mb Σ2x2B4 DDR Separate I/O SRAM 209-Bump BGA Commercial Temp Industrial Temp 250 - 333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • SigmaRAM JEDEC standard pinout and package • Dual Double Data Rate interface • Echo Clock outputs track data output drivers

GS8182S18

Abstract: GS8182S18D-167 GS8182S18D-200 GS8182S18D-250 GS8182S18D-250I GS8182S18D-267
Contextual Info: GS8182S18D-267/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 267 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

8180S18

Abstract: 8180S36 GS8180S36B-300 GS8180S36B-333 512Kx
Contextual Info: Preliminary GS8180S18/36B-333/300/250 18Mb Σ2x1B2 SDR Separate I/O SRAM 209-Bump BGA Commercial Temp Industrial Temp 250 - 333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • SigmaRAM JEDEC standard pinout and package • Dual Single Data Rate interface

Contextual Info: Preliminary GS8182S18D-250/200/167 SigmaRAM Family Overview me nd ed for Ne w GS8182S18 are built in compliance with the SigmaSIO-II SRAM pinout standard for Separate I/O synchronous SRAMs. They are 18,874,368-bit 18Mb SRAMs. These are the first in a family of wide, very low voltage HSTL I/O SRAMs designed

Contextual Info: GS8182Q08/09/18/36BD-300M 165-Bump BGA Military Temp 18Mb SigmaQuad-IITM Burst of 2 SRAM 300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Military Temperature Range • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

Contextual Info: GS8182Q08/09/18/36BD-300M 165-Bump BGA Military Temp 18Mb SigmaQuad-IITM Burst of 2 SRAM 300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • Military Temperature Range • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

Contextual Info: GS8182D08/09/18/36BD-375M 165-Bump BGA Military Temp 18Mb SigmaQuad-IITM Burst of 4 SRAM 375 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Military Temperature Range • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS8182D36BD-375M

Contextual Info: GS8182D08/09/18/36BD-375M 165-Bump BGA Military Temp 18Mb SigmaQuad-IITM Burst of 4 SRAM 375 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • Military Temperature Range • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

8180Q18

Abstract: 8180Q36 GS818
Contextual Info: Preliminary GS8180Q18/36B-167/150/125 18Mb Σ2x2B2 HalfRate DDR Separate I/O SRAM 209-Bump BGA Commercial Temp Industrial Temp 125 - 167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • SigmaRAM JEDEC standard pinout and package • Dual Double Data Rate interface

Contextual Info: Preliminary GS8182S18/36D-333/300/250/200/167 18Mb Σ2x1B2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

gs8182d18d200

Contextual Info: GS8182D18D-200/167 18Mb Burst of 4 SigmaQuad-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 200 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface

GS8182Q09

Abstract: GS8182Q09BGD-250 GS8182Q18BGD-200 GS8182Q36BD-250 GS8182Q18BGD-167 GS818 313-3AG
Contextual Info: Preliminary GS8182Q09/18/36BD-300/250/200/167/133 18Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 300 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS818

Contextual Info: Preliminary GS8182D09/18/36BD-333/300/250/200/167 18Mb SigmaQuad-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS8182Q18BGD-200

Contextual Info: GS8182Q08/09/18/36BD-333/300/250/200/167/133 18Mb SigmaQuad-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–133 167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS8182D09/18/36BD-333/300/250/200/167 18Mb SigmaQuad-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS8182D

Contextual Info: GS8182D08/09/18/36BD-400/375/333/300/250/200/167 18Mb SigmaQuad-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS8182S08/09/18BD-333/300/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS8182Q09/18/36BD-300/250/200/167/133 18Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 300 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS8182D18BGD-250I

Abstract: GS8182D36BGD-375I GS8182D36BD-250I 8182DXXB
Contextual Info: GS8182D08/09/18/36BD-400/375/333/300/250/200/167 18Mb SigmaQuad-IITM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaQuad Interface

Contextual Info: GS8182Q08/09/18/36BD-333/300/250/200/167/133 18Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–133 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package