CPCS C18 Search Results

Contextual Info: REVISION AB QSS-XXX-01-XXX-D-DP-RA-WT-XXX No OF POSITIONS DO NOT SCALE FROM THIS PRINT C C1-A-DC No OF POS / 16 x .7875[20.003]) + .550[13.97] REF -LS1: LOCKING SCREW (SEE FIG 2, SHT 3) (FOR MATING WITH QTS-.-RA-.LS1) -SP: SOLDER PIN (NOT AVAILABLE W/ LS1 OPTION)

Contextual Info: REVISION Z QSS-XXX-01-XXX-D-DP-RA-WT-XXX No OF POSITIONS DO NOT SCALE FROM THIS PRINT C C1-A-DC No OF POS / 16 x .7875[20.003]) + .550[13.97] REF -LS1: LOCKING SCREW (SEE FIG 2, SHT 3) (FOR MATING WITH QTS-.-RA-.LS1) -SP: SOLDER PIN (NOT AVAILABLE W/ LS1 OPTION)

Contextual Info: REVISION Y QSS-XXX-01-XXX-D-DP-RA-WT-XXX No OF POSITIONS DO NOT SCALE FROM THIS PRINT C C1-A-DC OPTION -016, -032, -048, -064 PER ROW (SEE NOTE 4) Y (No OF POS / 16) x .7875[20.003]) + .550[13.97] REF LEAD STYLE -01 (No OF POS / 16) x .7875[20.003]) + .300[7.62] REF

Contextual Info: REVISION AA QSS-XXX-01-XXX-D-DP-RA-WT-XXX No OF POSITIONS DO NOT SCALE FROM THIS PRINT C C1-A-DC No OF POS / 16 x .7875[20.003]) + .550[13.97] REF -LS1: LOCKING SCREW (SEE FIG 2, SHT 3) (FOR MATING WITH QTS-.-RA-.LS1) -SP: SOLDER PIN (NOT AVAILABLE W/ LS1 OPTION)

0xFF03

Abstract: PA10 PA11 PA13 PA15 PA16 PA19 PB10 AT91C140 ldr 100 k
Contextual Info: Features • ARM7TDMI ARM® Thumb® Processor Core – In-Circuit Emulator, 36 MHz operation • Ethernet Bridge • • • • • • • • • • – Dual Ethernet 10/100 Mbps MAC Interface – 16-Kbyte Frame Buffer 1 K-Byte Boot ROM, Embedding a Boot Program

Siapi

Contextual Info: Features • ARM7TDMI ARM® Thumb® Processor Core – In-Circuit Emulator, 40 MHz operation • 16-bit Fixed-point OakDSPCore® • • • • • • • • • • • • – Up to 60 MHz operations – 104K bytes of Integrated Fast RAM, Codec Interface

AT75C221

Abstract: PA13 PA18 PA20 PA31 PB10
Contextual Info: Features • ARM7TDMI ARM® Thumb® Processor Core – In-Circuit Emulator, 40 MHz operation • 16-bit Fixed-point OakDSPCore® • • • • • • • • • • • • – Up to 60 MHz operations – 104K bytes of Integrated Fast RAM, Codec Interface

Contextual Info: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.

Contextual Info: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.

I960CA

Abstract: CN8236 CX28250EVM Bt8223
Contextual Info: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.

Contextual Info: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.

I960CA

Abstract: CN8236 CN8236EBG 28236-12 0x940
Contextual Info: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.

Contextual Info: R O C K W E L L Network access S E M I C O N D U C T O R S Y S T E M S RS8234 ServiceSar with xBR Traffic Management data sheet PROVIDING HIGH SPEED MULTIMEDIA CONNECTIONS Because Communication Matters RS8234 ServiceSAR with xBR Traffic Management ATM Service Segmentation and Reassembly Controller

A31 cpcs

Abstract: cpcs c18
Contextual Info: Traffic Manager Co-processor Data Sheet Description 89TTM553 Preliminary Information* 89TTM55x Features The 89TTM553 is a flow-based traffic management co-processor that can be used in conjunction with the 89TTM552. It has two major functional parts: the queue manager QM and the

Flip-chip 1.8V SRAM

Abstract: 89TTM553 ZTM200
Contextual Info: Traffic Manager Co-processor Data Sheet Description 89TTM553 Preliminary Information* 89TTM55x Features Features The 89TTM553 is a flow-based traffic management co-processor that can be used in conjunction with the 89TTM552. It has two major functional parts: the queue manager QM and the

ZTM200

Abstract: 89TTM553
Contextual Info: Traffic Manager Co-processor Data Sheet Description The 89TTM553 is a flow-based traffic management co-processor that can be used in conjunction with the 89TTM552. It has two major functional parts: the queue manager QM and the FLQ scheduler. The QM is responsible for all the non-bandwidth functions, which include managing up to 1 Million queuing structures,

Contextual Info: Traffic Manager Co-processor Data Sheet Description The 89TTM553 is a flow-based traffic management co-processor that can be used in conjunction with the 89TTM552. It has two major functional parts: the queue manager QM and the FLQ scheduler. The QM is responsible for all the non-bandwidth functions, which include managing up to 1 Million queuing structures,

CN8234

Abstract: BT82
Contextual Info: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and

Contextual Info: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and

I960CA

Abstract: CRC10 RS8234 RS8250 on-demand multicast messages
Contextual Info: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and

BSDE

Abstract: I960CA pinout of bel 187 transistor RS8250 CRC10 RS8234 SCR SN 101
Contextual Info: Advance Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal

i960CA

Abstract: BSDE CRC10 RS8234 RS8250 schematics c band power supply satellite receiver OC26 Intel p45 motherboard
Contextual Info: R O C K W E L L Network access S E M I C O N D U C T O R S Y S T E M S RS8234 ATM ServiceSAR Plus with xBR Traffic Management datasheet PROVIDING HIGH SPEED MULTIMEDIA CONNECTIONS September 1998 Preliminary Information This document contains information on a product under development. The parametric information contains target

Contextual Info: Preliminary Data Sheet May 9, 2003 TAAD08JU21BCLSU3A-DB AAL2/AAL5 SAR Engine, Versions 2.1 and 3.1 1 Features 3 Description • System-on-a-chip integrated circuit supports lowspeed ATM adaptation process for next-generation wireless base transmission station BTS , base station controller (BSC), node B, radio network controller (RCN), and voice gateway applications.

Contextual Info: Preliminary Data Sheet May 9, 2003 TAAD08JU21BCLS2-DB SAR-2K AAL2/AAL5 SAR Engine, Versions 2.1 and 3.1 1 Features 3 Description • System-on-a-chip integrated circuit supports lowspeed ATM adaptation process for next-generation wireless base transmission station BTS , base station controller (BSC), node B, radio network controller (RCN), and voice gateway applications.