COPYRIGHT 1994 Search Results

503 20 010 10 vogt

Abstract: 503 10 010 00 vogt vogt transformer s3 l5051 X005 mst 718 VOGT 503 vogt 543 crystal 48 MHz VOGT T1 503 L5024
Contextual Info: Cologne Chip 4QdQCXUUd 752BDB1 8B3=!13B 8B3=73;2585>R^]ca^[[Ta fXcW BCX]cTaUPRT P]S DB1X]cTaUPRT 9P]dPah! Copyright 1994-2001 Cologne Chip AG All Rights Reserved The information presented can not be considered as assured characteristics. Data can change without notice. Parts of the

DSLAM configuration AWS

Abstract: rx bc nbk TSC 13003 pcr 465 ATML 18751 circuit BKC International mpc82 bsdl nd1 marking code acm 33221
Contextual Info: MC92520 ATM Cell Processor User’s Manual MC92520UM/D Rev. 0, 12/2000 DigitalDNA and Mfax are trademarks of Motorola, Inc. Information in this document is provided solely to enable system and software implementers to use Motorola microprocessors. There are no express or implied copyright licenses granted hereunder to design or fabricate Motorola integrated circuits or integrated

SN54BCT541

Abstract: SN74BCT541A BCT541
Contextual Info: SN54BCT541, SN74BCT541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS011D – JULY 1988 – REVISED SEPTEMBER 1994 • • • • • SN54BCT541 . . . J OR W PACKAGE SN74BCT541A . . . DW OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces ICCZ

SN74LVC828

Contextual Info: SN74LVC828 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCAS347A – MARCH 1994 – REVISED JULY 1995 D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54ALS03B, SN74ALS03B QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS SDAS013B – MARCH 1984 – REVISED DECEMBER 1994 SN54ALS03B . . . J PACKAGE SN74ALS03B . . . D OR N PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip

Contextual Info: UCC5614 SLUS349B − DECEMBER 1994 − REVISED APRIL 2005 9ĆLINE 3 TO 5 VOLT LOW CAPACITANCE SCSI ACTIVE TERMINATOR FEATURES D Complies with SCSI, SCSI−2 and SPI−2 Single D D D D D D D D D D Ended Standards 2.7-V to 5.25-V Operation 1.8-pF Channel Capacitance during

SN74LVCH16241A

Contextual Info: SN74LVCH16241A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCAS348E – MARCH 1994 – REVISED JUNE 1998 D D D D D D D DGG OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus  Family EPIC  (Enhanced-Performance Implanted CMOS) Submicron Process

Contextual Info: Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. 18-Bit Registered Transceivers SCCS056A - August 1994 - Revised October 2001 Features • • • • • • • • CY74FCT16500T CY74FCT162500T

Contextual Info: 1CY74FCT162H501 T Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16501T CY74FCT162501T CY74FCT162H501T SCCS057B - August 1994 - Revised September 2001 18-Bit Registered Transceivers Features

Contextual Info: SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DECEMBER 1982 – REVISED DECEMBER 1994 • • • • • description These 8-bit universal shift /storage registers feature multiplexed I/O ports to achieve full 8-bit

Contextual Info: Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. SCCS059B - August 1994 - Revised September 2001 Features • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved

Contextual Info: O PA OPA1 OPA 131 OPA2 31 2131 O PA OPA131 OPA2131 OPA4131 4131 OP A41 31 131 OPA4 131 SBOS040A – NOVEMBER 1994 – REVISED DECEMBER 2002 General-Purpose FET-INPUT OPERATIONAL AMPLIFIERS FEATURES ● FET INPUT: IB = 50pA max ● LOW OFFSET VOLTAGE: 750µV max

Contextual Info: SN54ALS169B, SN54AS169A, SN74ALS169B, SN74AS169A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS SDAS125B – MARCH 1984 – REVISED DECEMBER 1994 • • • • • Fully Synchronous Operation for Counting and Programming Internal Carry Look-Ahead Circuitry for

Contextual Info: www.ti.com SN65LBC180 SN75LBC180 RGV−16 D−14 N−14 SLLS174D – FEBRUARY 1994 – REVISED FEBRUARY 2005 LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS • • DESCRIPTION The SN65LBC180 and SN75LBC180 differential driver and receiver pairs are monolithic integrated

Contextual Info: SN54ABT7819 512 x 18 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SGBS305D – AUGUST 1994 – REVISED APRIL 1998 D D D D D D D Member of the Texas Instruments Widebus Family Advanced BiCMOS Technology Free-Running CLKA and CLKB Can Be Asynchronous or Coincident

Contextual Info: TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002 1 8 2 7 3 6 4 5 GND RT DTC SCP 3 2 1 20 19 NC GND FK PACKAGE TOP VIEW NC D OUT VCC COMP FB OUT D D, JG OR P PACKAGE (TOP VIEW) Complete PWM Power Control

Contextual Info: TLC7701, TLC7725, TLC7703, TLC7733, TLC7705 MICROPOWER SUPPLY VOLTAGE SUPERVISORS SLVS087L − DECEMBER 1994 − REVISED FEBRUARY 2003 D Power-On Reset Generator D Automatic Reset Generation After D D D D D D D Reference Programmable Delay Time by External

RX1214B130Y

Abstract: RX1214B80W
Contextual Info: DISCRETE SEMICONDUCTORS DATA SHEET RX1214B80W; RX1214B130Y NPN microwave power transistors Product specification Supersedes data of November 1994 1997 Feb 14 Philips Semiconductors Product specification NPN microwave power transistors FEATURES • Suitable for short and medium

Contextual Info: SN54ABT18640, SN74ABT18640 SCAN TEST DEVICES WITH 18-BIT INVERTING BUS TRANSCEIVERS SCBS267C – FEBRUARY 1994 – REVISED JULY 1996 D D D D D D SN54ABT18640 . . . WD PACKAGE SN74ABT18640 . . . DGG OR DL PACKAGE TOP VIEW Members of the Texas Instruments

Contextual Info: SN54LVTH18652A, SN54LVTH182652A, SN74LVTH18652A, SN74LVTH182652A 3.3-V ABT SCAN TEST DEVICES WITH 18-BIT TRANSCEIVERS AND REGISTERS SCBS312C – MARCH 1994 – REVISED JUNE 1997 D D D D D D D D Members of the Texas Instruments SCOPE  Family of Testability Products

Contextual Info: TL16C552A, TL16C552AM DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999 D D D D D D D D IBM PC/AT  Compatible Two TL16C550 ACEs Enhanced Bidirectional Printer Port 16-Byte FIFOs Reduce CPU Interrupts

Contextual Info: TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS SLOS110A – MAY 1992 – REVISED AUGUST 1994 D D D D D D D Wide Range of Supply Voltages Over Specified Temperature Range: TA = – 40°C to 85°C . . . 2 V to 8 V Fully Characterized at 3 V and 5 V

Contextual Info: TMS320C44 DIGITAL SIGNAL PROCESSOR SPRS031C − AUGUST 1994 − REVISED MARCH 2004 D Highest Performance Floating-Point Digital D D D D D D D D D Signal Processor DSP − TMS320C44-60: 33-ns Instruction Cycle Time, 330 MOPS, 60 MFLOPS, 30 MIPS, 336M Bytes/s

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS074A – Revised June 2003 The CD4514B and CD4515B types are supplied in 16-lead hermetic dual-in-line ceramic packages F3A suffix , 16-lead dual-in-line plastic packages (E suffix), and 16-lead small-outline packages (M and M96 suffixes).