PLX9050
Abstract: PLX9080 Video Encoders SAA7112 QCIF samsung BT856 SAA7185 circuits AT2011 KS0125 KS0127
Contextual Info: A T 2 0 11 MPEG-1 Video CODEC The AT2011 is a single chip video encoder / decoder optimized for real time compression and decompression based on the MPEG International Compression Standard. Specifications/Features z Supports I/P/B frame compression z Supports
|
Original
|
at201130fps15fpsplx9080/plx9050+1216mbits64mbitssaa7112bt829aplx9050plx9080video encodersqcif samsungbt856saa7185 circuitsks0125ks0127
|
PDF
|
MN67735JA
Contextual Info: LSIs for DVD MN85571AC Single-Chip Audio/Video MPEG2 Encoder • Overview The MN85571AC is an audio/video encoder that performs video compression in conformance with the ISO/IEC 13818-2 MPEG2 video and ISO/IEC 11172-2 (MPEG1 video) standards and audio compression in conformance with
|
Original
|
mn85571aclqfp208-p-2828sdd00023aemmn67735ja |
PDF
|
MN85560
Abstract: MN67735JA CDO7 MN85571AC dolby digital encoder MPEG 1 Audio Compression
Contextual Info: LSIs for DVD MN85571AC Single-Chip Audio/Video MPEG2 Encoder • Overview The MN85571AC is an audio/video encoder that performs video compression in conformance with the ISO/IEC 13818-2 MPEG2 video and ISO/IEC 11172-2 (MPEG1 video) standards and audio compression in conformance with
|
Original
|
mn85571acmn85560mn67735jacdo7+2dolby digital encodermpeg 1 audio compression
|
PDF
|
vw2010
Abstract: compression mpeg 1 layer 2 audio compression layer 2
Contextual Info: DVP-2420E 2-ch PCI-104 MPEG-1/2/4 Video Capture Module with SDK Features 2 channel composite inputs with MPEG-1/2/4 hardware compression Supports MPEG1 Layer II audio compression 60/50 fps NTSC/PAL at D1 resolution for recording and display
|
Original
|
dvp-2420epci-104vw20102002/95/ec+3adam-4055compression mpeg 1 layer 2audio compression layer 2
|
PDF
|
a7710
Abstract: videoflow samsung image signal processor ARRAY MICROSYSTEMS QCIF samsung real-time decoding GG317 H.261 encoder chip
Contextual Info: KS0143 ICC ELECTRONICS DSP The KS0143 (ICC : Image Compression Coprocessor) integrated circuit is a very high performance programmable processor optimized for the execution of DCT-based image compression algorithms such as MPEG-1, JPEG, and H.261. In combination with commonly
|
OCR Scan
|
ks0143ks0144a7710videoflow+6samsung image signal processorarray microsystemsqcif samsungreal-time decodinggg317h.261 encoder chip
|
PDF
|
720p30
Abstract: MAX64180 H.264 encoder arm doorbells MAX64180CXO impulse noise filter h.264 codec ARM9 AES
Contextual Info: GEO Semiconductor Inc. MAX64180 Compact 720p30 HD H.264 Compression SoC for Cameras General Description The MAX64180 is a fully integrated HD camera SoC that combines high-performance audio/video subsystems with H.264 compression, an ARM processor for system functions, AES/SHA accelerators
|
Original
|
max64180720p30240mhz248-pin+710x10mmmax64180cxoh.264 encoder armdoorbellsimpulse noise filterh.264 codecarm9 aes
|
PDF
|
simple subwoofer circuit diagram
Abstract: dual sub woofer circuit diagram Various Russian logic IC Datasheets spoken english from tamil ac3 coder 5.1 speaker with subwoofer circuit diagram surround sound subwoofer circuits 5.1 surround sound dolby circuits 7.1 surround sound dolby circuits tone control subwoofer circuit diagram
Contextual Info: Doc. A/52 10 Nov 94 12 Apr 95 24 May 95 20 Dec 95 DIGITAL AUDIO COMPRESSION STANDARD AC-3 ADVANCED TELEVISION SYSTEMS COMMITTEE James C. McKinney, Chairman Dr. Robert Hopkins, Executive Director ATSC Digital Audio Compression (AC-3) Standard Blank Page 20 Dec 95
|
Original
|
simple subwoofer circuit diagramdual sub woofer circuit diagramvarious russian logic ic datasheetsspoken english from tamil+6ac3 coder5.1 speaker with subwoofer circuit diagramsurround sound subwoofer circuits5.1 surround sound dolby circuits7.1 surround sound dolby circuitstone control subwoofer circuit diagram
|
PDF
|
IR Sensor transmitter and receiver pair
Abstract: MP-130M power module hd 110M remote control rx tx AL9M802 PLC modem homeplug upa plc standard "IR Sensor" block diagram of plc
Contextual Info: Features ● Send both A/V signals and Ethernet data to remote site through powerline ● Four RJ-45 ports at both TX and RX ● Three sets of AV inputs at TX; two sets of AV output at RX ● MPEG-2 video compression ● MPEG1 layer 2 audio compression ● Best BOM cost – majority of key chips are from
|
Original
|
rj-45250msal9m802b-evb-v-250m48khz+15256kbps200ms350msmp-110m--homeplugmp-120m--homeplugir sensor transmitter and receiver pairmp-130mpower module hd 110mremote control rx txal9m802plc modemhomeplugupa plc standardir sensorblock diagram of plc
|
PDF
|
vw2010
Abstract: spdif 5.1 Vweb ac3 decoder spdif BT-656 ITUR-656 IEC905 mpeg-2 TS demux encoder aac layer 2 compression mpeg 1 layer 2
Contextual Info: 10/17/2001 Version 0.7 VW2010 MPEG-1, 2 & 4Audio/Video CODEC Preliminary Product Brief Vweb, a leading provider of video compression and decompression chips, has created the VW2010, a simultaneous MPEG-1, 2, 4 and H.263 A/V compression/decompression CODEC chip. The VW2010
|
Original
|
vw2010vw21016-bit162mhz+10itu-r-656spdif 5.1vwebac3 decoder spdifbt-656itur-656iec905mpeg-2 ts demuxencoder aac layer 2compression mpeg 1 layer 2
|
PDF
|
rh10
Abstract: c-cube
Contextual Info: DVXPERT 6110 SINGLE-CHIP PROFESSIONAL ENCODER HIGHLY INTEGRATED MPEG-2 ENCODING FOR PROFESSIONAL VIDEO BROADCAST AND VIDEO CONTRIBUTION/DISTRIBUTION APPLICATIONS DIGITAL VIDEO BROADCAST MPEG-2 is the compression format that earns wide acceptance in the digital video broadcast environment. This is due to its interframe encoding capability, which enables high compression and thus significantly reduces bandwidth for transmission and storage in the broadcast space. MPEG-2 Main Level @
|
Original
|
rh10c-cube |
PDF
|
2E14
Abstract: mpeg-1 encoder compression mpeg 1 layer 2
Contextual Info: TECHNICAL NOTE AN OVERVIEW OF THE MPEG COMPRESSION ALGORITHM CONTENTS Page I MPEG-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 I.1 I.2 I.3 I.4 I.5 I.6 ALGORITHM STRUCTURE AND TERMINOLOGY . . . . . . . . . . . . . . . . . . . . . . . . . . . .
|
Original
|
2e14mpeg-1 encodercompression mpeg 1 layer 2 |
PDF
|
2E14
Abstract: compression mpeg1 AN6520
Contextual Info: TECHNICAL NOTE AN OVERVIEW OF THE MPEG COMPRESSION ALGORITHM CONTENTS Page I MPEG-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 I.1 I.2 I.3 I.4 I.5 I.6 ALGORITHM STRUCTURE AND TERMINOLOGY . . . . . . . . . . . . . . . . . . . . . . . . . . . .
|
Original
|
2e14compression mpeg1an6520 |
PDF
|
56300
Abstract: DSP56366 Digital Theater System
Contextual Info: BR1806/D Rev 1 Digital Audio Solutions DSP56366 24-Bit Multichannel Audio Decoder Supports digital audio applications requiring digital audio compression and decompression, sound field processing, acoustic equalization and other digital audio algorithms. Benefits
|
Original
|
br1806/ddsp5636624-bitdsp56366p/d+3dsp56366um/d56300digital theater system
|
PDF
|
a1024 transistor
Abstract: transistor A1023 A1024 a1023 transistor a1024 a1024 equivalent "Digital Audio Receiver" A1024* transistor audio compression schematics digital satellite receiver
Contextual Info: COMPLETE, OFF-THE-SHELF AUDIO COMPRESSION THAT COMPRESSES YOUR TIME-TOMARKET AudiOasis MPEG Audio Encoder Module A1024 AUDIO SOLUTION ACCELERATED TIME-TO-MARKET SPACE SAVING, BUSINESS CARD SIZE DESIGN SIMPLIFIED AUDIO-VIDEO SYNCHRONIZATION FLOATING POINT
|
Original
|
a1024slw-129-01-s-sa1024 transistortransistor a1023+7a1023transistor a1024a1024 equivalentdigital audio receivera1024* transistoraudio compressionschematics digital satellite receiver
|
PDF
|
|
|
main distribution frame
Abstract: C-Cube Microsystems rh10 c-cube
Contextual Info: DVXPERT 6110 SINGLE-CHIP PROFESSIONAL ENCODER HIGHLY INTEGRATED MPEG-2 ENCODING FOR PROFESSIONAL VIDEO BROADCAST AND VIDEO CONTRIBUTION/DISTRIBUTION APPLICATIONS DIGITAL VIDEO BROADCAST MPEG-2 is the compression format that earns wide acceptance in the digital video
|
Original
|
main distribution framec-cube microsystemsrh10c-cube |
PDF
|
SAA7164
Abstract: SAA7163 serial parallel transport stream BGA364 NXP TV543 transport stream TV543 Trident Microsystems trident 3d video audio stream
Contextual Info: SAA7163/SAA7164 Single-/Dual-Channel Audio/Video Decoder and Compression Engine Integrated Solution for DVR and Time Shifting in Consumer Electronics Applications In February 2010, Trident Microsystems acquired the set-top box and televison product lines from NXP
|
Original
|
saa7163/saa7164saa7163/saa71640007a+9saa7163serial parallel transport streambga364nxp tv543transport streamtv543trident microsystemstrident 3dvideo audio stream
|
PDF
|
SAA7164
Abstract: saa7163
Contextual Info: SAA7163/SAA7164 Single-/Dual-Channel Audio/Video Decoder and Compression Engine Integrated Solution for DVR and Time Shifting in Consumer Electronics Applications In February 2010, Trident Microsystems acquired the set-top box and televison product lines from NXP
|
Original
|
saa7163/saa7164saa7163/saa716410007c+1saa7163
|
PDF
|
intel i860
Abstract: R4400
Contextual Info: Software Libraries Performance Computing, Inc. VDS Kit Multimedia Compression Decompression Library Standard Features These products are used by hardware designers who need to verify correctness of their hardware solutions. VDS Kits are also used in commercial and technical
|
Original
|
intel i860r4400 |
PDF
|
PQFP144
Abstract: decoder PQFP160 IMSA110 PGA100 PQFP100 mpeg PQFP-144 video decoder STI3500
Contextual Info: PROCESSORS & PERIPHERALS DIGITAL COMPRESSION Type IMSA110 STi3220 STi3520 STi3520A STi3430 STi3400 STi3500A STi3520M STi4500 STi4510 Description Image and Signal Processor Motion Estimation Processor MPEG Audio/MPEG-2 Video Integrated Decoder MPEG Audio/MPEG-2 Video Decoder with Memory Optimization
|
Original
|
imsa110sti3220sti3520sti3520a+15sti3430sti3400sti3500asti3520msti4500sti4510pqfp144decoderpqfp160pga100pqfp100mpegpqfp-144video decodersti3500
|
PDF
|
ML675200
Abstract: ML675200-LA ML67Q5200 ML67Q5200-NLA
Contextual Info: Audio Controllers ML675200/ML67Q5200 Digital Audio Controller Description The Oki ML675200 and ML67Q5200 Application Specific Standard Products ASSP devices are targeted at the growing market for applications using the MP3 audio processing compression protocol. Available in two versions, ROM-less or
|
Original
|
ml675200/ml67q5200ml675200ml67q520032-bit+316-bitml675200-laml67q5200-nla
|
PDF
|
C-Cube CL4000
Abstract: CLM4200 VIDEO CAPTURE CARD USER MANUALS video encoder mpeg C-Cube VRP3 programmable pipeline microcode memory CL4020 CL4010
Contextual Info: 1 Overview The C-Cube VideoRISC Processor VRP is a scalable RISC processor designed to efficiently implement motion-compensated, block/ DCT-based video compression algorithms in real time. This book describes the third instance of the VRP architecture: the
|
Original
|
cl4020cl4040cl4000clm4120+8clm4440c-cube cl4000clm4200video capture card user manualsvideo encoder mpegc-cube vrp3programmable pipeline microcode memorycl4010
|
PDF
|
simple srs wow schematic
Abstract: schematic diagram DVI to rca DB25 LPT dvi dual link schematic AN1250 G723 LFBGA64 STA015 TQFP44 STA013
Contextual Info: AN1250 APPLICATION NOTE STA014/STA015 MPEG LAYER III DECODER AND ADPCM CODEC by Marco Veneri 1. INTRODUCTION The STA015 device is an MPEG Layer III audio decoder with ADPCM compression / decompression capabilities and BYPASS mode for auxiliary audio sources post-processing
|
Original
|
an1250sta014/sta015sta015d00au1190+8simple srs wow schematicschematic diagram dvi to rcadb25 lptdvi dual link schematicg723lfbga64tqfp44sta013
|
PDF
|
color space converter verilog rgb ycbcr asic
Abstract: verilog code for mpeg4 edge-detection sharpening verilog code median Filter usb vcd player circuit diagram vhdl median filter mpeg2 encoder H.264 VGA encoder video scaler lcd HDMI to vga
Contextual Info: White Paper Broadcast Video Infrastructure Implementation Using FPGAs Introduction The proliferation of high-definition television HDTV video content creation and the method of delivering these contents in a bandwidth-limited broadcast channel environment have driven new video compression standards and
|
Original
|
color space converter verilog rgb ycbcr asicverilog code for mpeg4edge-detection sharpening verilog codemedian filter+6usb vcd player circuit diagramvhdl median filtermpeg2 encoderh.264 vga encodervideo scaler lcdhdmi to vga
|
PDF
|
db25 connector LPT
Abstract: simple srs wow schematic schematic diagram DVI to rca mp3 EVALUATION KIT SCHEMATIC srs wow schematic diagram of audio device LPT I2C AN1250 LFBGA64 STA015
Contextual Info: AN1250 APPLICATION NOTE STA014/STA015 MPEG LAYER III DECODER AND ADPCM CODEC by Marco Veneri 1. INTRODUCTION The STA015 device is an MPEG Layer III audio decoder with ADPCM compression / decompression capabilities and BYPASS mode for auxiliary audio sources post-processing
|
Original
|
an1250sta014/sta015sta015d00au1190+8db25 connector lptsimple srs wow schematicschematic diagram dvi to rcamp3 evaluation kit schematicsrs wowschematic diagram of audio devicelpt i2clfbga64
|
PDF
|
