CODED MARK INVERSION 1990 Search Results

PHASE LOCKED LOOP

Abstract: NCT Group
Contextual Info: SSI 78P2361 m m syshtis' STS-1 Line Interface A TDK Group/Company December 1992 DESCRIPTION FEATURES The SSI 78P2361 is a line interface transceiver IC intended for STS-1 51.84 Mbit/s applications. The receiver has a very wide dynamic range and is designed to accept B3ZS-encoded Alternate-Mark

78P2362

Abstract: gf 703 NCT Group
Contextual Info: SSI 78P2362 wmsitskttis’ 34.368 Mbit/s Line Interface A TDK Group/Company Preliminary Data December 1992 DESCRIPTION FEATURES The SSI 78P2362 is a line interface transceiver 1C intended for 34.368 Mbit/s applications. The receiver has a very wide dynamic range and is designed to

Contextual Info: SSI 78P2362 stmsmbns 34.368 Mbit/s Line Interface A TDK Group/Company Preliminary Data December 1993 DESCRIPTION FEATURES The SSI 78P2362 is a line interface transceiver IC intended for 34.368 Mbit/s applications. The receiver has a very wide dynamic range and is designed to

Contextual Info: skew swim SSI 78P2361 STS-1 Line Interface A TDK Group/Company December 1993 DESCRIPTION FEATURES The SSI 78P2361 is a line interface transceiver IC intended for STS-1 51.84 Mbit/s applications. The receiver has a very wide dynamic range and is designed to accept B3ZS-encoded Alternate-Mark

Contextual Info: SSI 78P7200 w im s v d w DS-3 Line Interface with Receive Equalizer s ' A TDK Group/Company December 1992 DESCRIPTION FEATURES The SSI 78P7200 is a line interface transceiver IC intended for DS-3 44.736 Mbit/s applications. The receiver has a very wide dynamic range and is

TR-TSY-000499

Abstract: ANSI T1.102 1987 TDK 78P7200 78P2361 78P2362 78P7200 PE-65969 TDK 78P7200-IH mini equalizer
Contextual Info: SSI 78P7200 ¿ é c o n s u s fe m E3/DS-3 Line Interface with Receive Equalizer s 'Company A TDK Group IC Preliminary Data December 1994 DESCRIPTION FEATURES Single chip transmit and receive interface for E3 34.368 Mblt/S or DS-3 (44.736 Mbit/S) applications

CPD 513

Abstract: 6 pin pulse transformer 111 78P7200-IH KSS Crystals 78P2361 78P2362 78P7200 D012 TDK 78P7200-IH mini equalizer
Contextual Info: SSI 78P7200 cw m s v s k m E3/DS-3 Line Interface with Receive Equalizer s ’ A TDK Group/Company Preliminary Data November 1994 DESCRIPTION FEATURES The SSI 78P7200 is a line interface transceiver 1C intended lo r DS-3 44.736 Mbit/s and E3 (34.368 Mbit/s) applications. The receiver has a very wide

Contextual Info: SSI 78P7200 M m M t a n s E3/DS-3 Line Interface with Receive Equalizer ' A TDK Group/Company Preliminary Data December 1994 DESCRIPTION FEATURES The SSI 78P7200 is a line interface transceiver 1C intended for DS-3 44.736 Mbit/s and E3 (34.368 Mbit/s) applications. The receiver has a very wide

78P2361

Abstract: 78P2362 78P7200 GR-253-CORE PE-65969 PT5045 center tapped transformer
Contextual Info: SSI 78P7200 S m iM h n s DS-3/E3/STS-1 Line Interface with Receive Equalizer " A TDK Group/Company September 1995 DESCRIPTION FEATURES The SSI 78P7200 is a line interface transceiver IC intended for STS-1 51.84 Mbit/s , DS-3 (44.736 Mbit/s) and E3 (34.368 Mbit/s) applications. The receiver has a

Contextual Info: SSI 78P7200 mmMbns' E3/DS-3 Line Interface with Receive Equalizer A TDK Group/Company Preliminary Data November 1994 DESCRIPTION FEATURES The SSI 78P7200 is a line interface transceiver 1C intended for DS-3 44.736 Mbit/s and E3 (34.368 Mbit/s) applications. The receiver has a very wide

TDK 78P7200-IH

Abstract: 78P2361 78P2362 78P7200 GR-253-CORE PE-65969 PT5045 signal detection circuit "peak hold" constant vol PEAK DETECTOR CIRCUIT SHORT NOTE
Contextual Info: 78P7200 DS-3/E3/STS-1 Line Interface With Receive Equalizer March 1998 DESCRIPTION FEATURES The 78P7200 is a line interface transceiver IC intended for STS-1 51.84 Mbit/s , DS-3 (44.736 Mbit/s) and E3 (34.368 Mbit/s) applications. The receiver has a very wide dynamic range and is

TDK 78P7200-IH

Contextual Info: 78P7200 DS3/E3/STS-1 Line Interface With Receive Equalizer March 1998 DESCRIPTION FEATURES The 78P7200 is a line interface transceiver IC intended for STS-1 51.84 Mbit/s , DS3 (44.736 Mbit/s) and E3 (34.368 Mbit/s) applications. The receiver has a very wide dynamic range and is

TDK 78P7200-IH

Abstract: TRW coded digital signals capacitor 12-24 pF Variable pin-compatible replacement
Contextual Info: &TDK. TSC 78P7200 DS-3/E3/STS-1 Line Interface with Receive Equalizer TDK SEMICONDUCTOR CORP. October 1996 DESCRIPTION FEATURES The TSC 78P7200 is a line interface transceiver IC intended forSTS-1 51.84 Mbit/s , DS-3 (44.736 Mbit/s) and E3 (34.368 Mbit/s) applications. The receiver has a

Contextual Info: XR-T6165 ¿E’ E X q R Codirectional Digital Data Processor .the analog p lu s com pany IP' /äSWSi*1 May 1997-3 FEATURES APPLICATIONS Low Power CMOS Technology CCITT G.703 Compliant 64kbps Codirectional Interface All Receiver and Transmitter Inputs and Outputs are

Contextual Info: XR-T6166 Ï S T E X A R .the analog plus company TM C odirectional Digital Data Processor March 1997-2 FEATURES APPLICATIONS • Low Power CMOS Technology • All Receiver and Transmitter Inputs and Outputs are TTL Compatible • Transmitter Inhibits Bipolar Violation Insertion for

Contextual Info: XR-T6165 .the analog plus company TM Codirectional Digital Data Processor May 1997–3 FEATURES APPLICATIONS D Low Power CMOS Technology D CCITT G.703 Compliant 64kbps Codirectional Interface D All Receiver and Transmitter Inputs and Outputs are TTL Compatible

Contextual Info: XR-T6166 C 'E X A R .the analog plus company Codirectional Digital Data Processor TM June 1997-3 A PP LIC A TIO N S FEA TUR ES CCITT G.703 Compliant 64kbps Codirectional Interface Low Power CMOS Technology All Receiver and Transmitter Inputs and Outputs are

TSC 232 CPE

Abstract: RS -12V SDS RELAY RS -24V SDS RELAY RSL -12V SDS RELAY univac DS1 frame synchronization CMI 1990 MS NAS DC standards parts cross reference coded mark inversion 1990 mtbf slc TCP 8026
Contextual Info: Philips Semiconductors Acronyms Networking acronyms A B ATM Adaptation Layer, two sublayers concerned with segmenting large PDUs into ATM cells; type 1 = CBR, 2 = VBR. See also SAR. B Bearer channel, a DS–0 for user trafrlc. BCC Block Check Code, a CRC or similarly calculated number

8 bit 92112

Abstract: Digital Alarm Clock by using ttl t6166cd Transpower Technologies PE-65535 XR-T6166 XR-T6166CD XR-T6166CP XR-T6166ID XR-T6166IP
Contextual Info: XR-T6166 .the analog plus company TM Codirectional Digital Data Processor June 1997–3 APPLICATIONS FEATURES D CCITT G.703 Compliant 64kbps Codirectional Interface D Low Power CMOS Technology D All Receiver and Transmitter Inputs and Outputs are TTL Compatible

telephone main distribution frame

Abstract: RJ48 pin out APDU spec mcl plp
Contextual Info: Philips Semiconductors Acronyms Networking acronyms A B ATM Adaptation Layer, two sublayers concerned with segmenting large PDUs into ATM cells; type 1 = CBR, 2 = VBR. See also SAR. B Bearer channel, a D S-0 for user trafrlc. BCC Block Check Code, a CRC or similarly calculated number

XRT6165ID

Abstract: se819 TX2M
Contextual Info: XR- T61 65 X T E X A R [.th e a n a lo g p lu s c o m p a n y Codirectional Digital Data Processor TM May 1997-3 FEATURES APPLICATIONS • Low Power CMOS Technology • • All Receiver and Transmitter Inputs and Outputs are TTL Compatible CCITT G.703 Compliant 64kbps Codirectional

XRT6166CP-F

Contextual Info: XR-T6166 .the analog plus company TM Codirectional Digital Data Processor June 1997–3 APPLICATIONS FEATURES D CCITT G.703 Compliant 64kbps Codirectional Interface D Low Power CMOS Technology D All Receiver and Transmitter Inputs and Outputs are TTL Compatible

rt6164

Abstract: 1PXF transformer
Contextual Info: XR-T61 66 C'EXAR [.the a n a lo g plu s Codirectional Digital Data Processor com pan y J M June 1997-3 APPLICATIONS FEATURES • Low Power CMOS Technology • • All Receiver and Transmitter Inputs and Outputs are TTL Compatible CCITT G.703 Interface •

Contextual Info: XR-T6165 .the analog plus company TM Codirectional Digital Data Processor May 1997–3 FEATURES APPLICATIONS D Low Power CMOS Technology D CCITT G.703 Compliant 64kbps Codirectional Interface D All Receiver and Transmitter Inputs and Outputs are TTL Compatible