CI2CI237 Search Results

Contextual Info: T D A 91 0 9 /N LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS HORIZONTAL • SELF-ADAPTATIVE ■ DUALPLLCONCEPT ■ 150kHz MAXIMUM FREQUENCY ■ X-RAY PROTECTION INPUT ■ l2C CONTROLS : H-POSITION, FREQUENCY GENERATOR FOR BURN-IN MODE VERTICAL ■ VERTICAL RAMP GENERATOR

Contextual Info: f Z 7 SG S-THO M SO N “ T#@ [Rii]Q ^©[l[L[l©iri lD©i T0505xH T0509xH SENSITIVE GATE TRIACS FEATURES = 5A = 400V to 800V • Ig t £ 5mA t o i 10mA ■ It r m s ■ V drm DESCRIPTION T0220 non-insulated (Plastic) The T05xxxH series of triacs uses a high

Contextual Info: fZ T ^ 7# S G S -T H O M S O N DälD e^ ElLllOT@IDei S TB 6 N A 60 N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR TYPE V STB6NA60 d ss 600 V R d Id S (o d < 1 . 2 6.5 A • . . . . . . . TYPICAL RDS(on) *= 1 £2 ± 30V GATE TO SOURCE VOLTAGE RATING

Contextual Info: ¿= 7 * > S G S -T H O M S O N J i. B ü il[ l g I [ L im ( M D ( g § T S 6 8 9 5 0 MODEM TRANSMIT ANALOG INTERFACE • TWO CHANNEL DIGITAL TO ANALOG CON­ VERTER FOR TRANSMISSION OF DIGITAL DATA TO THE TELEPHONE LINE AND ECHO CANCELLATION ■ 6TH ORDER SWITCHED CAPACITOR LOW

Contextual Info: / 3 T SCS-THOMSON *7 / ST24C01, ST25C01 ST24W01, ST25W01 SERIAL ACCESS 1K 128 x 8 EEPROM 00 • 1 MILLION ERASE/WRITE CYCLES with 10 YEARS DATA RETENTION ■ SINGLE SUPPLY VOLTAGE: - 3V to 5.5V for ST24 versions - 2.5V to 5.5V for ST25 versions ■ HARDWARE WRrTE CONTROL VERSIONS:

74LVQ244

Abstract: 74LVQ244M 74LVQ244T LVQ244 S020 GI 448
Contextual Info: ¿57 SGS-THOMSON lICTIfMOœ s 74LVQ 244 LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS NON-INVERTED . HIGHSPEED: tPD = 6 ns (TYP.) at Vcc = 3.3V . INPUT & OUTPUT TTL COMPATIBLE LEVELS • LOW POWER DISSIPATION: Icc = 4 |iA (MAX.) at T a = 25 °C ■ LOW NOISE:

VNH70N07

Contextual Info: rz7 ^7# SGS-THOMSON ¡Mn<E[Mi|[LiCTiF3 öl@ VNH70N07 ’’OMNIFET”: _ FULLY AUTOPROTECTED POWER MOSFET TARGET DATA TYPE VNH70N07 . . . . . . . . . . Vclamp R D S o n llim 70 V 0.015 n 70 A LINEAR CURRENT LIMITATION THERMAL SHUT DOWN SHORT CIRCUIT PROTECTION

t537

Contextual Info: S G S -1 H 0 M S 0 N RJOD @ [l[Lli©ra®RDD©i M 28L V 17 LOW VOLTAGE PARALLEL ACCESS 16K 2K x 8 EEPROM WITH SOFTWARE DATA PROTECTION • ■ ■ ■ FAST ACCESS TIME: 200ns SINGLE LOW VOLTAGE OPERATION LOW POWER CONSUMPTION FAST WRITE CYCLE: - 64 Bytes Page Write Operation

M74HC164

Contextual Info: SbE D • 7T2T537 OGB' HSM ô^b ■ S G T H S C S -T H O M S O N RfflO g (Q iö,[l(g R!lDgS S G M54HC164 M74HC164 T ~ H i ~ 0 ^ '0 £ S- THOMSON 8 BIT SIPO SHIFT REGISTER ■ HIGH SPEED tpD = 18 ns (TYP) at V c c = 5V ■ LOW POWER DISSIPATION Ice = 4 pA at TA = 25°C

Contextual Info: SGS-THOMSON TEA2029C COLOR TV SCANNING AND POWER SUPPLY PROCESSOR DEFLECTION DESCRIPTION • CERAMIC 500kHz RESONATOR FRE­ QUENCY REFERENCE ■ NO LINE AND FRAME OSCILLATOR AD­ JUSTMENT ■ DUAL PLL FOR LINE DEFLECTION ■ HIGH PERFORMANCE SYNCHRONIZATION

Contextual Info: 5 7 . S G S -T H O M S O N M28F841 llll g [s 5 (Q I[L I T O © lJÌ!lD (g Ì 8 Megabit (1 Meg x 8, Sector Erase) FLASH MEMORY PREUMI NARY DATA • SMALL SIZE PLASTIC PACKAGES TSOP40 and S044 ■ MEMORY ERASE in SECTORS - 16 Sectors of 64K Bytes each ■ 5V± 0.5V SUPPLY VOLTAGE

Contextual Info: Æ 7 S G S -T H O M S O N ^ 7 # * RÆQiMtliLti^TrWiDigi M39432 SINGLE CHIP 4 Megabit FLASH an 256K PARALLEL EEPROM MEMORY PRELIMINARY DATA • 3.3V±10% SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPARATIONS > 120ns ACCESS TIME FLASH and EEPROM blocks > WRITE, PROGRAM and ERASE STATUS BITS

Contextual Info: ¿ = 7 SGS-THOMSON *J Æ , ST7536 ÜSlDIS[Si lltll®ii’® HO S§ POWER LINE MODEM j • HALF DUPLEX SYNCHRONOUS FSK MODEM • Two programmable channels for 600bps data rate • Two programmable channels for 1200bps data rate ■ AUTOMATICALLY TUNED Rx AND Tx FILTERS

Contextual Info: SGS-THOMSON ST6260B ST6265B it e 8-BIT HCMOS MCUs WITH A/D CONVERTER, EEPROM & AUTO-RELOAD TIMER PRELIMINARY DATA • 3.0 to 6.0V Supply Operating Range ■ 8 MHz Maximum Clock Frequency ■ -40 to +85°C Operating Temperature Range ■ Run, Wait & Stop Modes

TCL COLOUR TV SCHEMATIC DIAGRAM

Abstract: xnxx BMS150 st1450 STI3500 STI3500 preliminary STI3520 4511 gm 71S1237 DD41
Contextual Info: "* J i, r Z 7 S G S - T H O M S O N M MSi sMM0(3i> STÌ3520 MPEG AUDIO / MPEG-2 VIDEO INTEGRATED DECODER PRELIMINARY DATA The STi3520 requires minimal support from an external microcontroller, which is mainly required to initialise the video decoder at the start of every

Contextual Info: r 7 z S Ä T# G S - m M S N S T B 6 0 N 0 3 L-1 0 M O r a m iC T Ifii * ® N - CHANNEL ENHANCEMENT MODE _ POWER MOS TRANSISTOR PRELIMIRARY DATA TYPE STB60N03L-10 V dss RDS on Id 30 V < 0.01 n 60 A . . . . . . . . TYPICAL RDS(on) = 0.0085 £2

LE33ACZ

Abstract: LE27ACZ LE12ACZ LE50ACZ LE50ACD 0TA12
Contextual Info: S G S -T H O M S O N M@as IILI B¥B lï!ll(Bi LEOOA/C SERIES VERY LOW DROP WITH INHIBIT VOLTAGE REGULATORS P R ELIM IN A R Y DATA • V E R Y LOW D R O P O U T VOLTAGE (0.2V TYP.) ■ V E R Y LOW Q U IE S C E N T C U RR EN T (TYP. 50nA IN O FF MODE, 0.5mA IN ON

Contextual Info: r=7 SGS-THOMSON 73 MtiMMILitglMDiiilgi * M624256 * 1 Megabit 256K x 4 VERY FAST SRAM WITH OUTPUT ENABLE • 256Kx 4 VERY FAST SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIMES: 15,20ns ■ LOW Vcc DATA RETENTION: 2V ■ TRI-STATE COMMON I/O ■ JEDEC PLASTIC SOJ, 400 mil PACKAGE

L4904A

Contextual Info: rZ J lË m S G S -T H O M S O N L4904A KÆQ g^(ô [itt=[i(g ïÉ (o )R !]D (g i DUAL 5V REGULATOR WITH RESET • O UTPUT C U R R EN T S: • F IX E D P R E C IS IO N 5V ± 2 % l01 = 50mA I 02 = 100mA O UTPUT V O LT A G E • R E S E T O U T P U T N O R M A L L Y HIGH

4094bf

Abstract: 4094B 4094be transistor BJ 932
Contextual Info: n n e /u n o u U o / m U s G S-THOMSON Q7C » | o •i a *v. INTEGRATED CIRCUIT 7929225 S 7 ^ 2 3 ? 0D14TL3 1 I t & it a *• -, , hqc/hcf 4M4B . 1 G S S E M IC O N D U C T O R 4 IC 08927 CQRP 8-STAGE SHIFT-AND-STORE BUS REGISTER • 3 - S T A T E P A R A L L E L O U T P U T S F O R C O N N E C T IO N T O CO M M O N B U S