CI 94086 Search Results
CI 94086 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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ci 7420
Abstract: MPN7453B MPN7453A MPN7453 MPN-7370 37X37 MPN7380 MPN-7330 ci 7453A
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DAE-100B. MPN-7453C MPN-7453B MPN-7453A MPN--7330 ci 7420 MPN7453B MPN7453A MPN7453 MPN-7370 37X37 MPN7380 MPN-7330 ci 7453A | |
RT54SX72S
Abstract: RT54SX-S voter PAR64 REQ64 TM1019 CQFP256
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RT54SX-S 100krad RT54SX72S RT54SX-S voter PAR64 REQ64 TM1019 CQFP256 | |
RTSX32
Abstract: voter PAR64 REQ64 RT54SX72S RT54SX-S TM1019 Cqfp256
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RT54SX-S 100krad RTSX32 voter PAR64 REQ64 RT54SX72S RT54SX-S TM1019 Cqfp256 | |
Pin Compatibility Allows Prototyping with Commercial SX-A FPGAs
Abstract: RT54SX72S-CQ256 RTSX32S
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RT54SX-S 100krad RT54SX-S Pin Compatibility Allows Prototyping with Commercial SX-A FPGAs RT54SX72S-CQ256 RTSX32S | |
TM101Contextual Info: Advanced v1.2.3 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 SEU Hardened Flip-Flops Eliminate Software TMR Necessity LETth > 40, GEO SEU Rate < 10–10 |
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RT54SX-S 100krad RT54SX-S TM1019 TM101 | |
Contextual Info: Advanced v0.1.1 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 Additional SEU Hardened Flip-Flops Eliminate Software TMR Necessity LETth > 40, GEO SEU Rate < |
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RT54SX-S 100krad | |
Contextual Info: Advanced v1.0.1 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 SEU Hardened Flip-Flops Eliminate Software TMR Necessity LETth > 40, GEO SEU Rate < 10–10 |
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RT54SX-S 100krad TM1019 | |
HiRel a54sx72a unusedContextual Info: Advanced v1.3 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 SEU Hardened Flip-Flops Eliminate Software TMR Necessity LET th > 40, GEO SEU Rate < 10–10 |
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RT54SX-S RT54SX-S TM1019 HiRel a54sx72a unused | |
RTAX2000
Abstract: IDTQS32X2384 352-Pin
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32-Bits 114his RTAX2000 IDTQS32X2384 352-Pin | |
RL2048dag
Abstract: RETICON RL 1024 STR 6656 RETICON RL0512DAG011 RL0512DKQ RL0512DAG RL2048DAG011 rl1024dag RL1024DAG-011
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OCR Scan |
1993EG 00045AA RL2048dag RETICON RL 1024 STR 6656 RETICON RL0512DAG011 RL0512DKQ RL0512DAG RL2048DAG011 rl1024dag RL1024DAG-011 | |
lm 6492
Abstract: MAX751CPA AX751 267-series MAX731 MAX731EVKIT-DIP MAX751 MAX751CSA MAX751MJA Nichicon PL-Series
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OCR Scan |
MAX751 150mA. lm 6492 MAX751CPA AX751 267-series MAX731 MAX731EVKIT-DIP MAX751CSA MAX751MJA Nichicon PL-Series | |
AX1000
Abstract: n14132 SYNAPTICAD WAVEFORMER ax125c k7g4 diode AA16
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622Mb/s 339kbits AX1000 n14132 SYNAPTICAD WAVEFORMER ax125c k7g4 diode AA16 | |
bga 896
Abstract: AX1000
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622Mb/s 339kbits JESD8-11) 5172160PB-3/6 bga 896 AX1000 | |
AF367
Abstract: AK 1022 IC KA 2312 P2272 AX1000
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700Mb/s 295kbits AF367 AK 1022 IC KA 2312 P2272 AX1000 | |
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Contextual Info: v3.0 eX Family FPGAs Le a di n g E d ge P er f o r m a n ce • 240 MHz System Performance Sp e ci f i c a t i on s • Individual Output Slew Rate Control • 2.5V, 3.3V, and 5.0V Mixed Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength • Software Design Support with Actel Designer Series and |
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Contextual Info: Cell & Macro Library Guide Actel Corporation, Sunnyvale, CA 94086 2001 Actel Corporation. All rights reserved. Part Number: 5029128-0 Release: February 2001 No part of this document may be copied or reproduced in any form or by any means without prior written consent of Actel. |
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3200DX
Abstract: FCTD16C TA191 CNT4A AO11 TA273 dece2x4
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MAX13000E
Abstract: MAX13000EEUE MAX13003E
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MAX13000E MAX13005E MAX13000, MAX13005E MAX13000EEUE MAX13003E | |
MAX13000E
Abstract: MAX13000EEUE MAX13003E
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MAX13000E MAX13005E MAX13000_ MAX13005E MAX13000EEUE MAX13003E | |
Contextual Info: 19-3692; Rev 1; 5/11 Ultra-Low-Voltage Level Translators The MAX13000E–MAX13005E 6-channel level translators provide the level shifting necessary to allow data transfer in multivoltage systems. Externally applied voltages, VCC and VL, set the logic levels on either side of |
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MAX13000Eâ MAX13005E MAX13005E | |
OF IC 741 opamp
Abstract: IC 741 OPAMP OF IC 741 op-amp 2n3906 equivalent transistor ro IC 741 OPAMP DATASHEET
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XL741 OF IC 741 opamp IC 741 OPAMP OF IC 741 op-amp 2n3906 equivalent transistor ro IC 741 OPAMP DATASHEET | |
ci 4759
Abstract: bi-directional inverter and energy storage system
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MAX13000E MAX13005E mvp/id/4759/t/al 15-Nov-2010 MAX13000E, MAX13001E, ci 4759 bi-directional inverter and energy storage system | |
Contextual Info: 19-3802; Rev 3; 6/08 16-Channel Buffered CMOS Logic-Level Translators ♦ Wide Supply Voltage Range VCC Range of 1.65V to 5.5V VL Range of 1.2V to VCC ♦ ESD Protection on I/O VCC Lines ±15kV Human Body Model ♦ Up to 20Mbps Throughput ♦ Low 0.03µA Typical Quiescent Current |
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16-Channel 20Mbps VCC12 VCC10 VCC11 VCC13 VCC14 VCC15 VCC16 MAX13101E | |
VL14 equivalent
Abstract: MAX13108E MAX13101-3 VL14
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16-Channel 20Mbps VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 MAX13101E VL14 equivalent MAX13108E MAX13101-3 VL14 |