CACHERAM Search Results

M6SS

Contextual Info: bbE D INTEGRATE» DEVICE M6SS771 G01E37T Ti|b • IDT CMOS CacheRAM 32k x 9-BIT 288K-BIT BURST COUNTER & SELF-TIMED WRITE IDT71589SA FEATURES: DESCRIPTION: • • • • • • • The IDT71589 is a very high-speed 32k x 9-bit static RAM with full on-chip hardware support of the 80486 CPU interface.

79R3000

Contextual Info: Bicameral CacheRAM” 288K 16K x 9 x 2 FOR RISC CACHES PRELIMINARY IDT71B229S FEATURES: DESCRIPTION: • Supports the R3000 and R3001 to 40MHz • Bicam eral organization: — Split instruction/data cache support — No bank-switching timing contention

INTEGRATED DEVICE TECHNOLOGY 71V432

Contextual Info: 32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V432 processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to

71586

Abstract: 71586S25 ic cmos 4039 TCL 2990 82A306 IDT71586
Contextual Info: CMOS STATIC RAM 64K 4Kx 16-BIT LATCHED CacheRAM IDT71586 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • W ide 4K x 16 Organization • High-speed access — Com mercial: 25 /3 5 /4 5 n s (m ax.) — Military: 3 5 /45/5 5n s (m ax.) • Internal fast 12-bit address latch (5ns set-up and hold

idt 71589

Abstract: IDT71589
Contextual Info: CMOS CacheRAM 32K x 9-BIT 288K-BIT BURST COUNTER & SELF-TIMED WRITE IDT71589SA Integ rated D evice T echnology, Inc. FEATURES: DESCRIPTION: • • • • • • • T h e ID T 7 1589 is a very high -spe ed 32K x 9-bit static RAM w ith full on-chip ha rdw are support of the 80486 CPU interface.

Contextual Info: bflE D • MÔES771 0014SDM 7T7 ■ IDT 128K/256K BYTE CMOS IDT7MP6085 SECONDARY CACHE MODULE IDT7MP6087 FOR THE INTEL i486™ _ I N T E G R A T E D D E VI CE FEATURES: • 128K /256K byte pin-compatible secondary cache modules • Uses the ID T 7 1589 32K x 9 CacheRAM™ with burst counter

71V536

Contextual Info: PRELIMINARY 32K X 36 CacheRAM IDT71V536 3.3V SYNCHRONOUS BURST SRAM WITH PIPELINED OUTPUT I n t e g r a t e d D e v iz e T e c h n o lo g y , l i e . FEATURES: • • • • • • • 32K x 36 m em ory configuration Supports high perform ance system speed -1 2 0 MHz

s0321

Abstract: l130v
Contextual Info: CMOS CacheRAM 32K X 9-BIT 288K-BIT BURST COUNTER & SELF-TIMED WRITE ADVANCE INFORMATION IDT71589 FEATURES: DESCRIPTION: • • • • T h e ID T 7 1 589 is an extrem ely high-speed 32K x 9-bit static RAM with full on-chip hardware support of the Intel ¡486 CPU

operation of D latch

Contextual Info: Integrated Device Technology, Inc. ADVANCE INFORMATION IDT71B229 Bicameral CacheRAM™ 256K-BIT 16K x 9 x 2 FOR RISC CACHES FEATURES: DESCRIPTION: • High speed supports fastest R3000 CPUs: — 15, 22, 28ns — Supports 33, 25 and 20MHz • Bicameral organization:

intel i486

Contextual Info: gPN 128K/256K BYTE CMOS SECONDARY CACHE MODULE FOR THE INTEL i486™ Idt IDT7MP6085 IDT7MP6087 In te g ra te d Dev Ice T echnology, Inc. FEATURES: • 128K/256K byte pin-compatible secondary cache modules • Uses the IDT71589 32K x 9 CacheRAM™ with burst counter

IDT71V432

Contextual Info: 32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V432 The IDT71V432 CacheRAM contains write, data, address, and control registers. Internal logic allows the CacheRAM to generate a self-timed write based upon a decision which can be left until the

IDT71V432

Contextual Info: PRELIMINARY 32K x 32 CacheRAM IDT71V432 3.3V SYNCHRONOUS SRAM WITH BURST COUNTER, SINGLE CYCLE DESELECT Integrated Device Technology, Inc. FEATURES: • 32K x 32 memory configuration • Supports high performance system speed - 100 MHz 5ns Clock-to-Data Access in Pipelined Mode

IDT71586

Contextual Info: CMOS STATIC RAM 6 4 K 4 K x 16-BIT LATCHED CacheRAM IDT 71586 FEATURES: DESCRIPTION: • Wide 4K x 16 Organization The IDT71586 is a fast 4K x 16 latched address CMOS static RAM designed to enhance cache memory designs. This device of­ fers improved circuit board densities overdesigns using traditional

Contextual Info: ADVANCE INFORMATION IDT71B229 Bicameral CacheRAM™ 256K-BIT 16K X 9 X 2 FOR RISC CACHES FEATURES: DESCRIPTION: • High speed supports fastest R 3 0 0 0 CPUs: — 15, 22, 28ns — Supports 33, 25 and 20 M H z • B icam eral organization: — Split instruction/data cache support,

IDT71V432

Abstract: MT58LC32K32D7LG-XX
Contextual Info: 32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V432 processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to

intel i486

Contextual Info: I N T E G R A T E D D E VI CE 47E D m 4 3 2 5 7 7 1 □Q10S3fe. fi B H I D T 128K BYTE CMOS SECONDARY CACHE MODULE FOR THE INTEL i486™ 1DT7MP6086 Integrated Device Technology, Inc. FEATURES: • 128K byte direct mapped secondary cache module • Uses the ID T71589 32K x 9 CacheRAM™ with burst

Contextual Info: dt) I n te g r a te d D 32K x 32 CacheRAM PRELIMINARY 3.3V SYNCHRONOUS SRAM WITH IDT71V432 BURST COUNTER, SINGLE CYCLE DESELECT / iz e T e c h n o lo g y , I n c . FEATURES: • 32K x 32 m em ory configuration • Supports high perform ance system speed - 83 MHz

Contextual Info: Integrated Device Technology, Inc. 32K x 18 CacheRAM BURST COUNTER & SELF-TIMED WRITE — FOR THE PENTIUM" PROCESSOR PRELIMINARY IDT71420 FEATURES: DESCRIPTION: • • • • Th e ID T 7 1420 is a high-speed 3 2K x 18-bit static RAM with full on-chip hardware support of the Pentium processor inter­

71V536

Contextual Info: PRELIMINARY 32K x 36 CacheRAM IDT71V536 3.3V SYNCHRONOUS BURST SRAM WITH PIPELINED OUTPUT Integrated Device Technology, Inc. FEATURES: • 32K x 36 memory configuration • Supports high performance system speed - 120 MHz 5.0ns Clock-to-Data Access . • LBO input selects interleaved or linear burst mode

SRAM 6116

Abstract: MP61 Intel-PENTIUM-PROCESSOR 82430NX NEPTUNE 7MPV6189 3058 7MPV6189
Contextual Info:  256KB AND 512KB SECONDARY CACHE MODULES FOR THE INTEL PENTIUM PROCESSOR Integrated Device Technology, Inc. PRELIMINARY IDT7MPV6179 IDT7MPV6189 IDT7MP6181 IDT7MP6182 IDT7MPV6179/89 and IDT7MP6181/82 use asynchronous and burst CacheRAMs respectively in plastic surface mount

IDT71420

Contextual Info: Integrated D evice T ech nology, Inc. 32K x 18 CacheRAM BURST COUNTER & SELF-TIMED WRITE — FOR THE PENTIUM” PROCESSOR PRELIMINARY IDT71420 FEATURES: DESCRIPTION: • • • • The IDT71420 is a high-speed 32K x 18-bit static RAM with full on-chip hardware support of the Pentium processor inter­

Contextual Info: 32K X 32 CacheRAM PRELIMINARY IDT71V432 3.3V SYNCHRONOUS SRAM WITH INTERLEAVED/LINEAR BURST COUNTER FEATURES: • 3 2 K x 32 m e m o ry c o n fig u ra tio n • S u p p o rts high p e rfo rm a n c e system sp e e d - 66 M H z 7 ns C lo c k -to -D a ta A c c e s s in P ipeline d M ode

idt71586

Abstract: intel 80386 SL intel 80386 pin diagram cacheram 82c307 cache controller IDT71586S25 chip and technology 82c307 82C30
Contextual Info: CMOS STATIC RAM 64K 4Kx 16-BIT LATCHED CacheRAM’ IDT 71586 FEATURES: DESCRIPTION: • W ide 4K x 16 O rg a n iza tio n • H ig h -spe e d a ccess - C o m m e rcial: 24/3 5/45 /5 5 n s (max.) - M ilitary: 3 5/4 5/55 n s (max.) • Internal fast 12-blt a dd re ss latch (5ns se t-u p & h o ld tim es)

Contextual Info: 32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V432 processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to