B888888 Search Results

ncl016

Contextual Info: •gg P R E L IM IN A R Y ^^^B88888888888888888888SSi^ Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 12 ns Features — ts = 7 n s • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — tco = 6.5 ns Product-term clocking

receiver sat pro

Contextual Info: >1MCC DEVICE SPECIFICATION QUAD FIBRE CHANNEL TRANSCEIVER S2076 GENERAL DESCRIPTION FEATURES • Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards. • 1062 MHz Fibre Channel operating rate -1/2 Rate Operation

GM71C4256B

Abstract: MQ5A
Contextual Info: @ LG Semicon. Co. LTD._ Description Features The GM71C4256B/BL is the new generation dynamic RAM organized 262,144 x 4 bit. GM71C4256B/BL has realized higher density, higher performance and various functions fay utilizing advanced CMOS process technology.

Contextual Info: Contents Features. 1 Pin Assignm ent. 1 Pin

6A14

Abstract: TSOP8
Contextual Info: Features • Organization: 32,768 words x 8 bits • Single 3.3 ± 0.3V power supply • High speed - 12 / 1 5 /2 0 ns address access time - 3 /4 /5 ns output enable access time • Very low power consumption - Active: 198 mW max, 12 ns cycle - Standby: 3.6 mW max, CMOS I/O

Contextual Info: PRELIMINARY DEVICE SPECIFICATION > 4 M C SONET/SDH/ATM OC-12 QUAD TRANSCEIVER FEATURES • Complies with ANSI, Bellcore, and ITU-T specifications • Supports 622.08 Mbps OC-12 • Quad transmitter incorporating phase-locked loop (PLL) clock synthesis from low speed

Contextual Info: @ LG Semicon. Co. LTD. Description Features The GMM7402000CS/SG is a 2M x 40 bits D y n a m ic R A M M O D U L E w h ic h is assembled 20 pieces of 1M x 4 bit DRAMs in 20/26 pin SOJ package on both side the p rin te d c irc u it board w ith d e co u p lin g

VSD17

Abstract: VSD17 drive gsd4 bel 187 transistor with diagram TRANSISTOR BEL 187 VSD25 BLH load cell 100 kn CC3319 BIR20 ibm hardware mca
Contextual Info: Pixe, CIRRUS LOGIC INC/ PIXEL bSE D B R0033fc,4 0Q0D17R 27b m p i> CL-PX2080 Preliminary Data Book Semiconductor A Cirrus Logic Company FEATURES • Mixes graphics and video in real time ■ Supports multiple, occluded video windows ■ Pixel-clock rates up to 85 MHz

Contextual Info: SN54LVT8996, SN74LVT8996 3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS S C B S 6 8 6 -A P R IL 1997 Members of Texas Instruments Broad Family of Testability Products Supporting IEEE Std 1149.1-1990 (JTAG) Test Access

Contextual Info: Assembly lnstructions-C61 SMB Amphenol CRIMP TYPE ANGLE PLUGS & ANGLE BULKHEAD JACKS C ferrule Amphenol Number Connector Type Cable RG-/U crimp body assembly cap Hex Cavity for Outer Ferrule Die Set for Tool Handle 227-944 Stripping Dimensions, Inches mm

MEMS blood pressure sensor

Contextual Info: MLX90807/90808 Integrated Relative and Absolute Pressure Sensors Features and Benefits Application Examples 1 Compact monolithic single die solution 1 Absolute and Relative pressure sensors for different ranges 1 Fully programmable through the connector

Contextual Info: PRELIMINARY DATA SHEET NEC MOS INTEGRATED CIRCUIT 64M-bit Synchronous DRAM 4-bank, LVTTL Description The ,uPD4564323 is a high-speed 67,108,864-bit synchronous dynamic random-access memories, organized as 524,288 words x 32 bits x 4banks. The synchronous DRAMs achieved high-speed data transfer using the pipeline architecture.

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT /JPD4564441,4564841,4564163 for Rev. E 64M-bit Synchronous DRAM 4-bank, LVTTL Description The ,uPD4564441, 4564841, 4564163 are high-speed 67,108,864-bit synchronous dynamic random-access memories, organized as 4,194,304 x 4 x 4, 2,097,152 x 8 x 4, 1,048,576 x16 x 4 word x bit x bank , respectively.

CAT35C102

Abstract: NM93CS46 NM93CS56 NM93CS66 S-29130A S-29220A S-29230A S-29330A S-29XX0A
Contextual Info: C o n te n ts Features . 1 Pin A s s ig n m e n t .1 Pin F u n c t io n s . 1 Block D ia g r a m .2 Instruction S e t . 2