ATMEL PACKAGING INFORMATION PLCC Search Results

eproms

Contextual Info: Features • Fast read access time – 55ns • Low-power CMOS operation • • • • • • • • • – 100µA max standby – 40mA max active at 5MHz JEDEC standard packages – 40-lead PDIP – 44-lead PLCC Direct upgrade from 512Kbit, 1Mbit, and 2Mbit

Contextual Info: Features • Fast read access time – 55ns • Low-power CMOS operation • • • • • • • • • – 100µA max standby – 40mA max active at 5MHz JEDEC standard packages – 40-lead PDIP – 44-lead PLCC Direct upgrade from 512Kbit, 1Mbit, and 2Mbit

Contextual Info: Features • Fast read access time – 45ns • Low-power CMOS operation • • • • • • • • – 100µA max standby – 20mA max active at 5MHz JEDEC standard packages – 28-lead PDIP – 32-lead PLCC 5V±10% supply High reliability CMOS technology

Contextual Info: Features • Fast read access time – 45ns • Low-power CMOS operation • • • • • • • • – 100µA max standby – 20mA max active at 5MHz JEDEC standard packages – 28-lead PDIP – 32-lead PLCC 5V± 10% supply High-reliability CMOS technology

Contextual Info: Features • Fast read access time – 90ns • Low-power CMOS operation • • • • • • • • – 100µA max standby – 40mA max active at 5MHz JEDEC standard packages – 32-lead PLCC – 32-lead PDIP 5V 10% supply High-reliability CMOS technology

Contextual Info: Features • Fast read access time – 55ns • Low-power CMOS operation • • • • • • • • – 100µA max standby – 35mA max active at 5MHz JEDEC standard packages – 44-lead PLCC Direct upgrade from 512Kbit and 1Mbit Atmel AT27C516 and AT27C1024

Contextual Info: Features • Fast read access time – 70ns • Low-power CMOS operation • • • • • • • – 100µA max standby – 30mA max active at 5MHz JEDEC standard packages – 32-lead PDIP – 32-lead PLCC 5V 10% supply High-reliability CMOS technology

Contextual Info: Features • Bipolar Speed in JEDEC Standard EPROM Pinout Read Access Time • 55ns 28-Lead 600 mil CERDIP and OTP Plastic DIP 32-Pad LCC, JLCC and OTP PLCC • Low Power CMOS Operation 100 jiA max. Standby 50 mA max. Active at 10 MHz • High Output Drive Capability

1N914

Abstract: AT27C1024 AT27C2048 AT27C4096 AT27C4096-55JI AT27C516
Contextual Info: Features • Fast Read Access Time – 55 ns • Low Power CMOS Operation • • • • • • • • • – 100 µA Maximum Standby – 40 mA Maximum Active at 5 MHz JEDEC Standard Packages – 40-lead PDIP – 44-lead PLCC – 40-lead VSOP Direct Upgrade from 512-Kbit, 1-Mbit, and 2-Mbit

AT27C516-55JC

Abstract: 27c516
Contextual Info: Features • Fast Read Access Time - 45 ns • Low Power CMOS Operation • • • • • • • – 100 µA max. Standby – 30 mA max. Active at 5 MHz JEDEC Standard Packages – 44-Lead PLCC – 40-Lead VSOP 10mm x 14mm 5V ± 10% Power Supply High Reliability CMOS Technology

Contextual Info: Features • Fast Read Access Time – 55 ns • Low-power CMOS Operation • • • • • • • – 100 µA Max. Standby – 25 mA Max. Active at 5 MHz JEDEC Standard Packages – 32-lead 600-mil PDIP – 32-lead PLCC – 32-lead TSOP 5V ±=10% Supply

27C1024

Abstract: AT27C1024-15JC AT27C1024-15JA at27c1024 AT27C102
Contextual Info: Features • Fast Read Access Time - 45 ns • Low-Power CMOS Operation • • • • • • • • – 100 µA max. Standby – 30 mA max. Active at 5 MHz JEDEC Standard Packages – 40-Lead 600-mil PDIP – 44-Lead PLCC – 40-Lead VSOP 10 mm x 14 mm

27c512r

Abstract: AT27C512R-70JC 3302 tsop AT27C512R-12JC AT27C512R AT27C512R 55JI AT27C512R-12PI ATMEL AT27C512R-15RC AT27C512R-12PA Atmel 27C512R
Contextual Info: Features • Fast Read Access Time - 45 ns • Low-Power CMOS Operation • • • • • • • – 100 µA max. Standby – 20 mA max. Active at 5 MHz JEDEC Standard Packages – 28-Lead 600-mil PDIP – 32-Lead PLCC – 28-Lead TSOP and SOIC 5V ± 10% Supply

AT27C256R-12JC

Contextual Info: Features • Fast Read Access Time - 45 ns • Low-Power CMOS Operation • • • • • • • – 100 µA max. Standby – 20 mA max. Active at 5 MHz JEDEC Standard Packages – 28-Lead 600-mil PDIP – 32-Lead PLCC – 28-Lead TSOP and SOIC 5V ± 10% Supply

Contextual Info: Features • Fast read access time – 90ns • Dual voltage range operation • • • • • • • • • – Low voltage power supply range, 3.0V to 3.6V, or – Standard power supply range, 5V  10% Compatible with JEDEC standard Atmel AT27C040

Contextual Info: Features • Fast read access time – 70ns • Dual voltage range operation • • • • • • • • • – Low voltage power supply range, 3.0V to 3.6V, or – Standard power supply range, 5V  10% Compatible with JEDEC standard Atmel AT27C010

Contextual Info: Features • Fast read access time – 90ns • Dual voltage range operation • • • • • • • • • – Low voltage power supply range, 3.0V to 3.6V, or – Standard power supply range, 5V  10% Compatible with JEDEC standard Atmel AT27C256R

atmel 424

Abstract: AMBIT inverter atmel 545 ATMEL 340 crystal oscillator buffer Structure of D flip-flop DFFSR s051 crystal OAI222 CMOS Transmission gate Specifications Tri-State Buffer CMOS
Contextual Info: Features • 0.5 µm Drawn Gate Length 0.45µm Leff Sea-of-Gates Architecture With Triple Level Metal • 3.3V Operation • 5.0V Compatible Input Buffers • On-chip Phase Locked Loop (PLL) Available to Synthesize Frequencies up to 150 MHz • • • •

Transistor Equivalent list po55

Abstract: atmel 938 on digital code lock using vhdl mini pr credence tester 2042B atmel 532 atmel 422 bsu 479 atmel 424 2042B-ASIC
Contextual Info: ATL25 Series . Design Manual Table of Contents Section 1 ATL25 Series ASIC. 1-1 1.1 1.2

Contextual Info: Features • Industry Standard Architecture – Low-cost Easy-to-use Software Tools • High-speed, Electrically Erasable Programmable Logic Devices • CMOS and TTL Compatible Inputs and Outputs – Input and I/O Pull-up Resistors • Advanced Flash Technology

V750C

Abstract: use PRESET 100K in circuit wincupl 393 AF Atmel CPLD In-System Program pin configuration of logic gates preset resistor ATF750LVC Atmel 318
Contextual Info: Features • 3.0V to 3.6V Operating Range • Advanced, High-speed, Electrically-erasable Programmable Logic Device • • • • • • • • • • • • • • – Superset of 22V10 – Enhanced Logic Flexibility – Architecturally Compatible with ATV750B/BL and ATV750/L Software and

AT27C256R

Abstract: AT27C256R-15JC 28P6
Contextual Info: Features • Fast Read Access Time - 45 ns • Low-Power CMOS Operation - 100 [iA max. Standby - 20 mA max. Active at 5 MHz • JEDEC Standard Packages - 28-Lead 600-mil PDIP - 32-Lead PLCC - 28-Lead TSOP and SOIC • 5V + 10% Supply • High Reliability CMOS Technology

PO61

Abstract: ATMEL 340 atmel 424 ATLS60 ATL60 ttl buffer 3.6v Tri-State Buffer bga ambit inverter circuit AOI222 ATMEL 218
Contextual Info: Features • • • • • • • • 0.6 µm Drawn Gate Length 0.5 µm Leff Sea-of-Gates Architecture with Triple Level Metal 5.0V, 3.3V and 2.0V Operation including Mixed Voltages On-chip Phase Locked Loop Available to Synthesize Frequencies up to 150 MHz and

Atmel 318

Abstract: ATF22V10BQL ATF22V10B ATF22V10BQ atv22v10b
Contextual Info: Features • Industry Standard Architecture – Low-cost Easy-to-use Software Tools • High-speed, Electrically-erasable Programmable Logic Devices – 7.5 ns Maximum Pin-to-pin Delay • Several Power Saving Options Device ICC, Standby ICC, Active ATF22V10B