sddf-3
Abstract: PM7342 PM8315 PM8316 TEMUX-84 LVDS32
Contextual Info: PM7342 S/UNI -IMA-32 Preliminary 32 Link Inverse Multiplexer for ATM IMA / UNI PHY UNI UTOPIA / ANY-PHY INTERFACE • Each link is software configurable as either a UNI or part of an IMA group. • Performs receive cell Header Error Check (HEC) checking and transmit
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PM4354
Abstract: PM73124 PM7324 PM7326 PM7340 PM7366
Contextual Info: PM7340 S/UNI -IMA-8 Preliminary 8 Link Inverse Multiplexer for ATM IMA / UNI PHY TSCLK[7:0] TSDATA[7:0] CTSCLK • Each link is software configurable as either a UNI or part of an IMA group. • Performs receive cell Header Error Check (HEC) checking and transmit
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PM4354
Abstract: PM73124 PM7328 PM7329 PM7351 IMA4
Contextual Info: PM7348 S/UNI IMA-4 Released 4 Link Inverse Multiplexer for ATM IMA / UNI PHY • Each link is software configurable as either a UNI or part of an IMA group. • Performs receive cell Header Error Check (HEC) checking and transmit cell HEC generation. • Optionally supports receive cell
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PM4354
Abstract: PM73124 PM7328 PM7329 PM7340 PM7351 PMC-2001521 atm header error checking dsl
Contextual Info: PM7340 S/UNI IMA-8 Released 8 Link Inverse Multiplexer for ATM IMA / UNI PHY FEATURES IMA • Supports up to eight T1, E1, DSL, or unchannelized links and up to eight IMA groups with one to eight links/group. • Link and Group State Machines implemented on-chip requiring no real
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0x1758
Abstract: dmo 365 r dmo 365 17X17 GR-253 GR-499-CORE XRT79L71 XRT79L71IB CIRCUIT DIAGRAM UPS 775 intel
Contextual Info: XRT79L71 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC JUNE 2007 GENERAL DESCRIPTION The XRT79L71 is a single channel, ATM UNI/PPP Physical Layer Processor with integrated DS3/E3 framing controller and Line Interface Unit with Jitter Attenuator that is designed to support ATM direct
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DSLAM
Abstract: CP12 CP14 CP15 CRC-10 CRC-16 S3029 DSLAM configuration ATM 814 DSLAM structure
Contextual Info: Freescale Semiconductor Freescale Semiconductor, Inc., 2004. All rights reserved. Freescale Semiconductor, Inc. DSLAM Application Note Freescale Semiconductor, Inc. DSLAM Line card ATM / FR Line Card Switching Fabric ••• ••• ••• 192 ADSL
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0X1F65
Abstract: 0X1121
Contextual Info: xr PRELIMINARY XRT79L71 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION OCTOBER 2005 GENERAL DESCRIPTION The XRT79L71 is a single channel, ATM UNI/PPP Physical Layer Processor with integrated DS3/E3 framing controller and Line Interface Unit with Jitter
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GR-499-CORE
Abstract: dmo 365 r 17X17 GR-253 XRT79L71 XRT79L71IB CIRCUIT DIAGRAM UPS HDLC HDB3 AMI ENCODER DECODER
Contextual Info: PRELIMINARY XRT79L71 1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMER/LIU COMBO - REGISTER/ OCTOBER 2010 GENERAL DESCRIPTION REV. P2.0.0 • Receiver Monitor mode handles up to 20 dB flat loss with 6 dB cable attenuation The XRT79L71 is a single channel, integrated DS3/
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tms 3874
Abstract: RS8228EBG RS8398 Rockwell framer" Trec Part Numbering System GR
Contextual Info: R O C K W E L L Network access S E M I C O N D U C T O R S Y S T E M S RS8228 Octal ATM Transmission Convergence PHY Device datasheett PROVIDING HIGH SPEED MULTIMEDIA CONNECTIONS September 1998 Advance Information This document contains information on a product under development. The parametric information contains target
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RS8228EBGB
Abstract: 28228-12 100064B
Contextual Info: RS8228 Octal ATM Transmission Convergence PHY Device The RS8228 Octal ATM Transmission Convergence PHY device dramatically improves performance for switch and access system low-speed ports by integrating all the ATM physical layer processing functions found in the ATM Forum Cell Based Transmission
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dmo 365 r
Abstract: RUR 117-5 ELLS 110 PC403 XRT79L71 XRT79L71IB 17X17 GR-253 GR-499-CORE E1 HDB3
Contextual Info: áç PRELIMINARY XRT79L71 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC JUNE 2003 REV. P1.0.3 GENERAL DESCRIPTION • JTAG Interface The XRT79L71 is a single channel, ATM UNI/PPP Physical Layer Processor with integrated DS3/E3 framing controller and Line Interface Unit with Jitter
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Cx2829
Abstract: ,national semiconductor Linear brief lb-3
Contextual Info: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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B56A
Abstract: Cx2829 J311 B21AD
Contextual Info: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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Cx2829
Abstract: TXC24 0x46-RXLIN "network interface cards" Trec Part Numbering System GR
Contextual Info: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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"network interface cards"
Abstract: conexant lan
Contextual Info: Preliminary Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. RS825x ATM Physical Interface PHY Devices The RS825x is a family of four 155 Mbps (OC-3/STM-1) ATM-SONET Physical Layer
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conexant c29
Contextual Info: Preliminary Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. RS825x ATM Physical Interface PHY Devices The RS825x is a family of four 155 Mbps (OC-3/STM-1) ATM-SONET Physical Layer
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11-B
Abstract: 11-D DS26101 bts 122 E1 frame
Contextual Info: DS26101 8-Port TDM-to-ATM PHY www.maxim-ic.com GENERAL DESCRIPTION FEATURES On the transmit side, the DS26101 receives ATM cells from an ATM device through a UTOPIA II interface, provides cell buffering up to 4 cells , HEC generation and insertion, cell scrambling, and converts the data
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Contextual Info: RS825x ATM Physical Interface PHY Devices The RS825x is a family of four 155 Mbps (OC-3/STM-1) ATM-SONET Physical Layer (PHY) devices with an integrated, low-jitter PLL clock and data recovery circuit. These devices have optimized SONET framer functions for mapping ATM cells to SONET
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Cx2829
Abstract: A1020 transistor Cx28297 A1020 0x19-RXG1 a1633 J119 J512 j512 data sheet "network interface cards"
Contextual Info: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and
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atm header error checking dsl
Abstract: CX28229 M28228 RS8228EBG RS8228EBGB RS8398
Contextual Info: RS8228/M28228 Octal ATM Transmission Convergence PHY Device The RS8228 Octal ATM Transmission Convergence PHY device dramatically improves performance for switch and access system low-speed ports by integrating all the ATM physical layer processing functions found in the ATM Forum Cell Based Transmission
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PLCD 190 P1
Abstract: CX27440 CX28333 CX28364 CX28365 CX28366 DS3-M13 cx2839 1000-port CT-R-06
Contextual Info: Advance Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. CX28365/CX28366/CX28364 x12, x6, x4 T3/E3 Framer and ATM Cell Transmission Convergence Sublayer
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28228-11
Contextual Info: RS8228/M28228 Octal ATM Transmission Convergence PHY Device The RS8228 Octal ATM Transmission Convergence PHY device dramatically improves performance for switch and access system low-speed ports by integrating all the ATM physical layer processing functions found in the ATM Forum Cell Based Transmission
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M02069
Abstract: bt8953 hecs 50 CX28229 M02063 M28228 RS8228EBG RS8228EBGB 4.20 mA Transmitter
Contextual Info: RS8228/M28228 Octal ATM Transmission Convergence PHY Device The RS8228 Octal ATM Transmission Convergence PHY device dramatically improves performance for switch and access system low-speed ports by integrating all the ATM physical layer processing functions found in the ATM Forum Cell Based Transmission
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PM7326
Abstract: PM7342 PM7350 UNI-IMA-32 LVDS32
Contextual Info: PM7342 S/UNI -IMA-32 Preliminary 32 Link Inverse Multiplexer for ATM IMA / UNI PHY FEATURES • Provides programmable limit on allowable differential delay and minimum number of links per group. • Performs ICP and stuff-cell insertion and removal. • Supports IMA frame length (M) equal
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