ATM CODING Search Results

CRC10

Abstract: CRC-10 CRC32 HQFP240 MB86697A RBS 3116 STR3130 uscc 685 685 uscc c.d.m. technology edo
Contextual Info: Product Datasheet 2.3 2000 MB86697A FireStream 155 April 2000 Version 2.3 ATM 155Mbps SAR Device The FireStreamTM155 is a high performance ATM protocol controller which autonomously terminates ATM Adaptation Layer standard Type 5 AAL5 . ATM cells are received through a UTOPIA v2.01 compliant

2256 1F4

Abstract: CRC10 CRC-10 CRC32 MB86695 bsdl RBS 3116 adtf 1102
Contextual Info: Product Datasheet 1.4 2000 MB86695 October 2000 Version 1.4 FireStream 50 ATM 52Mbps SAR Device The FireStream50 is a low cost ATM protocol controller which autonomously terminates ATM Adaptation Layer standard Type 5 AAL5 . ATM cells are received through a

RBS 3116

Abstract: 685 uscc
Contextual Info: Product Datasheet 2.4 2000 MB86697A FireStream 155 October 2000 Version 2.4 ATM 155Mbps SAR Device The FireStreamTM155 is a high performance ATM protocol controller which autonomously terminates ATM Adaptation Layer standard Type 5 AAL5 . ATM cells are received through a UTOPIA v2.01 compliant

RBS 2201

Abstract: cpu 226 155G CRC-10 CRC32 HQFP240 MB86698A MC68040 MC68060 MPC860
Contextual Info: Product Datasheet 2.1 2000 MB86698A FireStream 155G April 2000 Version 2.1 ATM 155Mbps SAR Device The FireStreamTM155G is a high performance ATM protocol controller which autonomously terminates ATM Adaptation Layer standard Type 5 AAL5 . ATM cells are passed via a UTOPIA v2.01 compliant

Contextual Info: 1 N ICStAR O verview The IDT77201 NICStAR PCI ATM Controller is a member of IDT's family of products for Asynchronous Transfer Mode ATM networks. The NICStAR performs both the ATM Adaptation Layer (AAL) Segmentation and Reassem­ bly (SAR) function and the ATM layer protocol functions.

Contextual Info: 1 N ICStAR O verview The IDT77211 NICStAR PCI ATM Controller is a member of IDT's family of products for Asynchronous Transfer Mode ATM networks. The NICStAR performs both the ATM Adaptation Layer (AAL) Segmentation and Reassembly (SAR) function and the ATM layer protocol functions.

DLR1040

Abstract: PM5345 PM7321 STS-48 signal path designer the 155.52 mbit/s physical layer interface schematics
Contextual Info: PMC-Sierra, Inc. APPLICATION NOTE PREVIEW INFORMATION THE ATM PHYSICAL LAYER THE ATM PHYSICAL LAYER

RBS 2111

Abstract: TM155 RBS 3116 LTPQ CRC10 CRC-10 CRC32 HQFP240 MB86697A LD2-5B
Contextual Info: Product Datasheet MB86697A F ire S tre a m 15 5 ATM 155Mbps SAR Device /FM LVNP D/FS155/DS/1973 The FireStream ™ 155 is a high performance ATM protocol controller which autonomously terminates ATM Adaptation Layer standard Type 5 AAL5 . ATM cells are received through a UTOPIA v2.01 compliant

Contextual Info: ALI-25C and ALI-25T ATM Line Interface Devices for 25 Mbit/s Operation TXC-07025 Chip Set DATA SHEET FEATURES DESCRIPTION Implements ATM-25 Mbit/s TC and PMD layer functions The ATM Line Interface 25 Mbit/s ALI-25 Chip Set pro­ vides the complete ATM-25 Physical Layer function

TXC-07225-ACPL

Contextual Info: ALI-25C and ALI-25T ATM Line Interface Devices for 25 Mbit/s Operation TXC-07025 Chip Set DATA SHEET FEATURES = DESCRIPTION • Implements ATM-25 Mbit/s TC and PMD layer functions The ATM Line Interface 25 Mbit/s ALI-25 Chip Set pro­ vides the complete ATM-25 Physical Layer function

pe-67583

Abstract: hecs 50 ATM-25 Crystal Oscillator TXC PIN DIAGRAM on pad for RJ45 ALI-25 ALI-25C ALI-25T TXC-05501 TXC-07025
Contextual Info: ALI-25C and ALI-25T ATM Line Interface Devices for 25 Mbit/s Operation TXC-07025 Chip Set DATA SHEET FEATURES DESCRIPTION implements ATM-25 Mbit/s TC and PMD layer functions The ATM Line Interface 25 Mbit/s ALI-25 Ch/p Set pro­ vides the complete ATM-25 Physical Layer function

50G7028

Abstract: 93C95
Contextual Info: ADVANCE INFORMATION PHY-TC IDT77101 for 25.6 Mbps ATM Networks Integrated Device Technology, Inc. FEATURES data communications and networking. The IDT77101 provides the Transmission Convergence TC sublayer portion of a 25.6 Mbps ATM PHY suitable for ATM networks using

ic 339

Abstract: rele nais dmo 465 XRT74L74 XRT74L74IB MIPS 32-bit bus architecture F25 marking DMO 465 R
Contextual Info: XRT74L74 PRELIMINARY 4 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER OCTOBER 2003 REV. P1.1.1 GENERAL DESCRIPTION The XRT74L74 4 Channel, ATM UNI/PPP Physical Layer Processor with integrated DS3/E3 framing controller is designed to support ATM direct mapping and

LXT6155LE

Abstract: LXT6155 GR-253 RG59U cortina cs Application Note document number 249280 G.703 standard - quad E1 interface
Contextual Info: Cortina Systems LXT6155 155 Mbps SDH/SONET/ATM Transceiver Datasheet The Cortina Systems® LXT6155 155 Mbps SDH/SONET/ATM Transceiver LXT6155 Transceiver is a high speed fully integrated transceiver designed for 155 Mbps SDH/SONET/ATM transmission system

LXT6155

Abstract: frequency doubler LXT6155LE
Contextual Info: Cortina Systems LXT6155 155 Mbps SDH/SONET/ATM Transceiver Datasheet The Cortina Systems® LXT6155 155 Mbps SDH/SONET/ATM Transceiver LXT6155 Transceiver is a high speed fully integrated transceiver designed for 155 Mbps SDH/SONET/ATM transmission system

dmo 265 r

Abstract: dmo 365 r MPC860 jtag AC16 GR-499-CORE I960 MPC860 XRT73L03 XRT74L73 XRT74L73IB
Contextual Info: XRT74L73 PRELIMINARY 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER OCTOBER 2003 REV. P1.0.1 GENERAL DESCRIPTION The XRT74L73 3 Channel, ATM UNI/PPP Physical Layer Processor with integrated DS3/E3 framing controller is designed to support ATM direct mapping and

PASSPORT 7480

Abstract: NORTEL PASSPORT 7480 7480 nortel NORTEL PASSPORT nortel passport 7480 specification passport PASSPORT 7400 acelp Multiservice switch 7400 NORTEL PASSPORT 7400
Contextual Info: White Paper Voice Networking over ATM with Passport Voice Networking over ATM with Passport ABSTRACT Voice networking over asynchronous transfer mode ATM , which was first introduced by Nortel Networks, will revolutionize the industry with fundamental changes to the cost/value equations

Cx2829

Abstract: ,national semiconductor Linear brief lb-3
Contextual Info: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and

CRC32

Abstract: ML6672 MOTION SCIENCE 594
Contextual Info: June 1997 Application Note 30 ATM Applications Using the ML6672 INTRODUCTION Asynchronous Transfer Mode ATM has been recognized in the last few years as a communications architecture of choice which will unify public and private networks. Originally, ATM was selected as the transfer mode for

pt4172

Abstract: atm with an eye block diagram 1408U CRC32 ML6674 ML6674CH atm with an eye work flow block diagram how to security provide for an atm with an eye
Contextual Info: July 1999 Application Note 45 ATM Applications Using the ML6674 INTRODUCTION Asynchronous Transfer Mode ATM has been recognized in the last few years as a communications architecture of choice which will unify public and private networks. Originally, ATM was selected as the transfer mode for

P44 transistor

Abstract: ATM timing diagram transistor p11 p p48
Contextual Info: ispLever CORE TM UTOPIA Level 3 ATM Receive Interface User’s Guide October 2003 ipug19_01 Lattice Semiconductor UTOPIA Level 3 ATM Receive Interface Introduction The UTOPIA Level 3 ATM Receive core, UTOP3-ATMR, is one of four UTOPIA Level 3 cores available from Lattice.

61535

Abstract: AN-523 rt022 arbiter decoder -1996 GFC01 "LCK"
Contextual Info: COBRA Device COnstant Bit Rate ATM Adaptation Layer 1 TXC-05427B DATA SHEET FEATURES DESCRIPTION COBRA COnstant Bit Rate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both

Cx2829

Abstract: A1020 transistor Cx28297 A1020 0x19-RXG1 a1633 J119 J512 j512 data sheet "network interface cards"
Contextual Info: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and

IFFT

Abstract: mtc diode MTC-20135PQ-C MTC-20135PQ-I MTC-20136 MTK-20131 I960 MTC-20134 mtc 20135 dynamite
Contextual Info: MTC-20135 ADSL DMT Transceiver with ATM Framer Data Sheet Preliminary Information Rev. 3 - October 1998 Features General Description • ANSI TI.413 issue 2 standard DMT modem with embedded , bypassable, ATM framer • Byte interface or Standard Utopia level 1 and level 2 ATM