AO 7E Search Results

HD6309

Abstract: hitachi HD6309 HD63B09 HD63C09 PCR 606 J HD6809 adcb 27 byg 220 HD6800 HMCS6800
Contextual Info: HD63B09, HD63C09-CMOS MPU Micro Processing Unit Pin Arrangement Description The HD6309 is the highest 8-bit microprocessor of HMCS6800 family, which is compatible with the conventional HD6809. v ss NMI IRQ FiRQ BS BA Vcc Ao A, a2 A3 Ä4 As A6 Ä7

HD6309

Abstract: HD63B09 opel HD63C09 HD6800 HD6809 HMCS6800 Hitachi HD63B09 hitachi HD6309
Contextual Info: HD63B09, HD63C09-CMOS MPU Micro Processing Unit Pin A rrangem ent Description T h e HD6309 is the highest 8-bit m icroprocessor of H M CS6800 fam ily, w h ich is com patible w ith the conventional HD6809. vss L_ I O NMI IRQ FIRQ BS BA Vcc Ao A, a2

3584JM

Abstract: 3584JMQ
Contextual Info: * * 3584JM i. ''- i # 7c =25’C W * # fi le ^ Vbc(V) | ill) 7E £ if «: j u t FET) 3 5 8 4 JM Q — V Kcc It ( Tc=25°C) <E # it * | BS ¥ | ft * DC^f — 7 °> ) l — 7° Ao 120 ± 6 .5 Icc V cc' ± 7 0 — ±150 V Vid + Vcc + - Vcc \ + Mrc- - Vcc —55— H125

OC-1 general electric

Abstract: in1004
Contextual Info: 07E D § k2LHfl27 □DlMlTD T I jniTSUBISHl -CDGTL LOGIC} MITSUBISHI ADVANCED SCHOTTKY TTL M 7 4 F 3 7 4 P /F P /D W P BOOS-ÜoM»18 ;VÓCV OCTAL D-TYPE EDGE-TRIGGERED FLIP FLOP W ITH 3-STATE OUTPUT NONINVERTED aoít'a ~r-Hb-07-H DESCRIPTION PIN CONFIGURATION (TOP VIEW)

Contextual Info: 13 12 10 CKT SIZE PART NUMBER 20 20 30 AO 70 7AAA1-9001 74441-9010 74441-9007 74441-9005 74441-9003 nn n n n n n n n n •A ” "B" "C" „D . 1.10/.043 1.10/.043 1.10/.043 1.10/.043 1.10/.043 11.00/.433 11.00/.433 15.00/.591 19.00/.7 48 31.00/1.220 9.40/.378

Contextual Info: REV ECN APP'D. BY 4/21/03 DATE AO - - 10/15/03 A1 6224 RGC 01-30-06 A2 7469 JM BOTTOM SURFACE OF JACK PCB SURFACE B ( .550 -J \^ i - j ~ \ B ( .148 [3.75] ) TO HIGHEST POINT OF BEAM — 111 iiinij i-III milililí J NOTES: 1. CONNECTOR MATERIALS: HOUSING: THERMOPLASTIC UL94 V-0

Contextual Info: 159 - • DATEL m it ft k f t Ta =25°C £ at -& 7E A M -I0 3A B € f i l£ - t ^ % i<J Vcc(V) | ft $k & ft i FET, V cc V ft 400 D C ;f — ~ f> sv— 7° ! Ao (Ta = 25°C) m # iu m \m k 14 Se * fli Icc Vcc' V , lo HY B H VW ±15 ±10 Vo ±20 V'cc — h

LH0022

Abstract: 0022C
Contextual Info: — 208 — • N.S.C. t À miS 12 7t" Ê fê /E j LH 0022, C SË f - fë ijlf f l, + 22 Vcc n, (7 a -=25°C Vcc(V) j Ö'J 7\ il'j 7E *E 'j ' 1 m ft V DCi-7’> f ii= 2 k ß . 0022 V'cc=15V. Vn=±10V 0022C Ao 100 75 Vcc= +15V, T ,„ 0g K U -f m £ h 7

d6 21 a bc 6502 em 78 p 15

Abstract: 6502 instruction set
Contextual Info: SflE D WESTERN DESIGN CENTER TDD1SÛ5 00DDDD7 T4D • IdESD 7 WDC W65C02S THE WESTERN DESIGN CENTER, INC. PH11 OUT RDY VPB VSS RESB PHI2(OUT) SOB 6 7 8 9 10 5 4 3 2 1 44 43 42 PHI2(IN) IRQB NMIB SYNC VDD AO A1 VSS A2 A3 A4 A5 A6 MLB W65C02S INFORMATION, SPECIFICATION AND DATA SHEET

AIC-610

Contextual Info: AIC-610F adaptec, inc. Integrated Programmable Storage Controller PRELIMINARY o 5 < il s iê li Peripheral Data Controller 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 O A l -AO-A D 7-AD6-AD 5-AD 4-AD3-AD2-A D I -ADO-V C C -XFER-ALE-CLKA-CURB—

Contextual Info: s s AO HOUSING 0.55 0.55 4. IE C T. Z-Z FITTIN G NAIL l-e-Z ±0.05 0. 15 0.7 0. I Y s it e h - U - K x '- d TRADE MARK' q i 5 0.4 PITCH (B ) MODEL NO. GENERAL TOLERANCES (UNLESS SPECIFIED ) MATERIAL SEE NOTES O Q GOI ^ mm 10 RoT AK EU CH I □ INCH 1 W I0 /I6

nas 1791

Abstract: FDC1793 FDC1791 FD179X-02 FDC1797 1791 FDC FD179x FDC1791-02 WD FD179x-02 controllers 1797 fdc
Contextual Info: STANDARD MICROSYSTEMS CORPORATION, Floppy Disk Controller/Formatter FDC FDC FDC FDC FDC FDC FDC 1791-02 1792-02 1793-02 1794-02 1795-02 1797-02 fJPC FAMILY PIN C O N FIG U R A TIO N I 1 1 2 cs t 3 RE £ 4 Ao t 5 A, [ 6 DALO * t 7 NC WE D A L I* D A L 2* DAL3*

UDN2580A replacement

Abstract: M2580P UDN2580A UDN2580
Contextual Info: MITSUBISHI ELEK {LINEAR} bB 11J. I ¿ u D E ^ bEMTfiHb □ □□410ci 3 ~P~i/3~2.S~_ INDUSTRY STANDARD M IT S U B IS H I L IN M Ao Rc o n SEMICONDUCTORS IV ¡¿ O o U 8-UNIT 500mA SOURCE TYPE DARLINGTON TRANSISTOR ARRAY WITH CLAMP DIODE DESCRIPTION The M 2580 is an 8-channel source driver transistor array.

Contextual Info: G65SC802 G65SC816 A CMD Microcircuits CMOS 8/16-Bit Microprocessor Family Features General Description • Advanced CM O S design fo r low pow er c o nsu m ptio n and increased noise im m unity The G 65SC802 and G65SC816 are AO V-C M O S AD Vanced C M O S 16bit m icroprocessors featu rin g total softw are c o m p a tib ility w ith 8-bit

A18E

Abstract: 42-PIN 44-PIN 48-PIN a18e 40
Contextual Info: O K I Semiconductor MSM531642D 1 M -W o rd X 16-B it B u rs t-M o d e M A S K R O M • DESCRIPTION M SM 531642D is h ig h -p erfo rm an ce 16M b it RO M . It is altern ately operated in ran d om access m ode and in b u rst m ode. In b u rst m ode data is sequentially ou tp ut cued w ith AO

Contextual Info: $ M 28C16A ic r o c h ip 16K 2K x 8 CMOS EEPROM FEATURES 24 D V ce A5C 3 M C 4 22 H A 9 A3C S 20 23 D A B 21 D W E A2C 6 o 18 3 A 1 0 A1C 7 AO C 8 5 16 : c e 17 D l/0 7 vooC 9 v o i z 10 16 3 1 /0 6 15 D i/ o s I/0 2 C 11 14 H U 0 4 VssC 12 13 ] 1/03 A6

IDT71589

Contextual Info: INTEGRATED DEVICE M 7E D B MÛ3S771 GDlOeCH 128K/256K BYTE CMOS SECONDARY CACHE MODULE FOR THE INTEL i486™ ; 5 *IDT IDT7MP6085 IDT7MP6087 Integrated D evice Technology» Inc. FEATURES: four ID T71589s on on eside of the sam e substrate. Extremely high speeds are achieved using IDT's high performance, high

MV65401

Abstract: MV65401-25
Contextual Info: PLESSEY SEMICO ND UC TO RS TS D e | 7E50S13 ODObVOfi Ö .'J*' 7 2 2 0513 P L E S S E Y SEMI C O N D U C T O R S 95 0 . 0 6 7 0 8 PLESSEY D ^ ¿ '3 5 PRELIMINARY INFORMATION Sem iconductors • MV65401/2/3/4 64-WORD X 4/5-BIT FIRST-IN FIRST-OUT MEMORIES SUPERSEDES MARCH 1987 EDITION

Contextual Info: ! ! "#$%& "#$%& ' * ! ! '' ) ! $ $ ' ( 8 9 ) % ; 8 %) * % 8=8 *> 8 ? @ 8 ? @ 8 8 1CD7 *7 7EF 3G / HB * ) ); 8 ) ) 8( : # B B ! *:K B 7 *: 8 : 8 *1 ) *? * #= * D $ $ + ',-. / 0 1, 234 / 7 *: ! 8 %) I7B 7 8 8 ; A ' ' + 1,56 / * % < ; ) *1 B * > )8 8 B B

LS147

Abstract: El 3021
Contextual Info: s G S-THOMSON 07E D | 7e]a 1-237 DDlbD?^ S | LOW POWER SCHOTTKY INTEGRATED CIRCUITS i^ l4 L S 1 4 7 /t4 8 T74LS147/148 T-66-21-57 67C 16 208 PRELIMINARY DATA 10-LINË-TO-4-L1NE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS DESCRIPTIO N These priority Encoders decode the inputs to en­

HP5082-2811

Abstract: AN 7134 NV11 IC AN 7134 7134 OP-AMP 339 PIN DIAGRAM DAC-7134B binary weight resistance dac DAC713
Contextual Info: DATEL INC □ 7E D llO M n E L SbSlSbl G0Q.0ÛLS b DAC-7134B, DAC-7r134U 14-Bit Microprocessor-compatible Multiplying D/A Converters T-5 -09-90 FEATUR ES G E N E R A L DESCRIPTION • 14-Blt linearity (0.003% FSR The DAC-7134 achieves true 14-blt linearity by combining a fourquadrant, multiplying DAC with on-chip, PROM-controlled correc­

Contextual Info: 5 7E » SYNERGY SEMIC ON DUC TOR IQOlBfll OOOOOE1 flOO SY10480-6 * 16K x 1 ECL RAM SYNERGY SEMICONDUCTOR SY100480-6 SY101480-6 - ^ - 2 3 - 0 ys DESCRIPTION FEATURES The Synergy SY10/100/101480 are 16384-bit Random Access Memories RAMs , designed with advanced Emitter

Contextual Info: SAMSUNG ELECTRONICS INC fc.7E D • □ G17 1 1 b b?G KM23C32005 CMOS MASK ROM 32M-Bit 2 M x 16 CMOS MASK ROM FEATURES GENERAL DESCRIPTION • 2,097,152 x 16 bit organization • Fast access time Random access: 150ns (max.) Page access: 70ns (max.) • Supply voltage: single +5V

74367

Abstract: 4710BX MV8804 74HCT515 Crosspoint Switches
Contextual Info: P LES S EY SEMICONDUCTORS 12E 7EE0S13 D 000=1134 0 PLESSEY S e m ic o n d u c to rs . T - 7 S - I I - Z I MV8804 8 x 4 BIDIRECTIONAL ANALOG SWITCH ARRAY The MV8804 is a CMOS/LSI 8 x 4 Analog Switch Array incorporating control memory 32 bits , decoder and digital