AND LOGIC GATE Search Results

SOT886

Abstract: BGA Package 0.35mm pitch SOT891 wcsp sot886-1 SOT-902 sot665
Contextual Info: NXP MicroPak and MicroPak II packages for single-, dual-, and triplegate logic functions World’s smallest leadless logic packages MicroPak and MicroPak II packages are the world’s smallest packages for single-, dual-, and triple-gate logic. They are 65% - 74% smaller than their PicoGate equivalents and offer a larger

pls173

Abstract: DIN173 PLS173a PLS173N
Contextual Info: Philips Semiconductors Programmable Logic Devices Product specification Programmable logic array 22 x 42 × 10 DESCRIPTION PLS173 FEATURES The PLS173 is a two-level logic element consisting of 42 AND gates and 10 OR gates with fusible link connections for programming

MIL-STD-806B

Abstract: MIL-STD-806 toggle nand hct mos Transmission gate IC
Contextual Info: Logic Sym bols and Truth Tables C2M O S Logic TC74HC/HCT Series 6. How to Read MIL Type Logic Symbols and Truth Tables Table 6-1. MIL Logic Symbols Circuit Logical Equation or Truth Logic Sym bol Function Table 6-1 How to Read MIL Type Logic Symbols Table 6-1 shows the MIL type logic symbols used in high-speed

Transmission gate IC

Contextual Info: HOW TO READ MIL TYPE LOGIC SYMBOLS AND TRUTH TABLES 6. How to Read MIL Type Logic Symbols and Truth Tables speed CMOS iCs. This logical chart is based on m il -s t d Clocked inverter and transmission gates employ spe­ cific symbols. 6-1 How to Read MIL Type Logic Symbols

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD MAC97A6/8 TRIACS LOGIC LEVEL TRIAC . DESCRIPTION 1 Logic level sensitive gate triac intended to be interfaced directly to microcontrollers, logic integrated circuits and other low power gate trigger circuits. SOT-223 FEATURES

cd40001

Abstract: SN74AHC2G russian transistor cross-reference CD4000 SERIES BOOK NXP 74LVC1G datasheet IC CD 40106 4093 ic for bcd counter sn 16861 741HC REGULATOR IC 7804
Contextual Info: Logic Guide www.ti.com/logic 3Q 2009 2 Logic Guide 2009 ➔ Important Notice Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any

LATTICE 3000 family

Abstract: e2cmos technology lattice 22v10 programming GAL20V8 GAL22V10 GAL16V8 GAL20RA10 LATTICE 3000 family architecture
Contextual Info: Lattice Overview among other segments, standard logic, custom-designed application specific integrated circuits ASICs, which include conventional gate-arrays, standard cells and full custom logic circuits , and PLDs. General Lattice Semiconductor Corporation designs, develops

M74HCxxxTTR

Abstract: 74ABT FAIRCHILD HEF4000B MM74HC nxp Cross-reference HEF4000 LVT32 SN74HC 74HC HC PORTFOLIO
Contextual Info: General-purpose logic solutions Commitment and innovation 2 Logic solutions Commitment and innovation NXP is deeply committed to the logic market and continually invests in new process and package technologies, and packaging facilities, to ensure that our portfolio remains leadingedge. We offer a very broad variety of innovative

CD74HCT21

Abstract: CD74HC21 CD74HC21E CD74HC21M CD74HCT21E CD74HCT21M CT21 74HCT 74LS
Contextual Info: [ /Title CD74H C21, CD74H CT21 /Subject (High Speed CMOS Logic Dual 4Input CD74HC21, CD74HCT21 Data sheet acquired from Harris Semiconductor SCHS131 High Speed CMOS Logic Dual 4-Input AND Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC21, CD74HCT21, logic gates utilize

Contextual Info: ATV750/L Features • Third Generation Programmable Logic Structure High Density Replacement for Discrete Logic High Speed - Plus a New Low Power Version Increased Logic Flexibility 42 Inputs and 20 SUM terms Flexible Output Logic 20 Flip-Flops -1 0 Extra

NC7SZ57

Contextual Info: Revised April 2000 NC7SZ57 • NC7SZ58 TinyLogic UHS Universal Configurable 2-Input Logic Gates General Description Features The NC7SZ57 and the NC7SZ58 are Universal Configurable 2-Input Logic Gates. Each device is capable of being configured for 1 of 5 unique 2-input logic functions.

NC7SZ57L6X

Abstract: 2 input XNOR GATE z58 diode NC7SZ57 NC7SZ57P6X NC7SZ58 NC7SZ58L6X NC7SZ58P6X SC70-6
Contextual Info: Revised May 2002 NC7SZ57 • NC7SZ58 TinyLogic UHS Universal Configurable 2-Input Logic Gates General Description Features The NC7SZ57 and the NC7SZ58 are Universal Configurable 2-Input Logic Gates. Each device is capable of being configured for 1 of 5 unique 2-input logic functions.

Contextual Info: Revised March 2002 NC7SZ57 • NC7SZ58 TinyLogic UHS Universal Configurable 2-Input Logic Gates General Description Features The NC7SZ57 and the NC7SZ58 are Universal Configurable 2-Input Logic Gates. Each device is capable of being configured for 1 of 5 unique 2-input logic functions.

Contextual Info: Specifications ispLSI and pLS11048 Lattice ispLSI and pLSI 1048 ;Semiconductor I Corporation High-Density Programmable Logic Features Functional Block Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, Ten Dedicated Inputs — 288 Registers

THX 201

Abstract: PA7572 "Programmable Electrically Erasable Logic Array" loadable counter with timing diagram PA7572P-20 PA7572F-20
Contextual Info: PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cell - D,T and JK registers with special features

ISPLSI3320-70LQ N

Contextual Info: Specifications ispLSI and pLSI 1048C Lattice ispLSI and pLSI 1048C ;Semiconductor I Corporation High-Density Programmable Logic Features Functional Block Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output

Contextual Info: Features Third Generation Programmable Logic Structure - Easily Achieves Gate Utilization Factors of 80 Percent Increased Logic Flexibility - 86 Inputs and 72 Sum Terms Flexible Output Macrocell - 48 Flip-Flops - 2 per Macrocell - 3 Sum Terms - Can Be OR'ed and Shared

ICT Peel

Abstract: PA7572
Contextual Info: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cell - D,T and JK registers with special features

marking codes fairchild

Abstract: HEP08 fairchild marking codes sot-23 TOREX TOP CODE AND8004 t324 SOT-353 A7 marking L5 sot363 xaa643 and8004 D
Contextual Info: AND8004/D ON Semiconductor Logic Date Code and Traceability Marking Prepared by: Douglas Buzard, Logic Product Engineering Edited by: Dianne von Borstel http://onsemi.com APPLICATION NOTE INTRODUCTION This is a summary of ON Semiconductor MOS Logic Device, Date Code, and Traceability Marking. We want to

ksd 9700

Abstract: 5A0B e729 D2B2 ne5522 E93D CP 8113 5b1c 7900 80pin diode 36b3
Contextual Info: CXD2719Q Single-Chip Dolby Pro Logic Surround Decoder Description The CXD2719Q is a CMOS LSI developed for Dolby Pro Logic Surround. A SRAM for short delay and AD/DA converters are built in, and all functions necessary for Dolby Pro Logic Surround such as an

Contextual Info: lattice semiconductor LiflE D Lattice Features pLSI and ispLSI' 1048 High-Density Programmable Logic Functional Block Diagram • PROGRAMMABLE AND IN-SYSTEM PROGRAMMABLE HIGH DENSITY LOGIC — High-Speed Global Interconnects — 8000 PLD Gates — 96 I/O Pins, Ten Dedicated Inputs

Contextual Info: Lattice Specifications ispLSI and pLS11032 ispLSI and pLSI 1032 ;Semiconductor I Corporation High-Density Programmable Logic Features • Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — High Speed Global Interconnect — 6000PLD Gates — 64 I/O Pins, Eight Dedicated Inputs

Contextual Info: QL5130 QuickPCI Data Sheet • • • • • • 33 MHz/32-Bit PCI Target with Embedded Programmable Logic and Dual Port SRAM Device Highlights High Performance PCI Controller Programmable Logic • 57 K system gates/619 logic cells • 13,824 RAM bits, up to 157 I/O pins

RFL1N08L

Abstract: RFL1N10L RFP2N08L RFP2N10L
Contextual Info: Logic-Level Power MOSFETs_ RFL1N08L, RFL1N10L, RFP2N08L, RFP2N10L File Number 1510 N-Channel Logic Level Power Fielcf-Effect Transistors L2 FET 1 and 2 A, 80 V and 100 V ros(on): 1.05fi and 1 .2 0 Features: • Design optim ized fo r 5 volt gate drive