AND LOGIC GATE Search Results

SOT886

Abstract: BGA Package 0.35mm pitch SOT891 wcsp sot886-1 SOT-902 sot665
Contextual Info: NXP MicroPak and MicroPak II packages for single-, dual-, and triplegate logic functions World’s smallest leadless logic packages MicroPak and MicroPak II packages are the world’s smallest packages for single-, dual-, and triple-gate logic. They are 65% - 74% smaller than their PicoGate equivalents and offer a larger

pls173

Abstract: DIN173 PLS173a PLS173N
Contextual Info: Philips Semiconductors Programmable Logic Devices Product specification Programmable logic array 22 x 42 × 10 DESCRIPTION PLS173 FEATURES The PLS173 is a two-level logic element consisting of 42 AND gates and 10 OR gates with fusible link connections for programming

MIL-STD-806B

Abstract: MIL-STD-806 toggle nand hct mos Transmission gate IC
Contextual Info: Logic Sym bols and Truth Tables C2M O S Logic TC74HC/HCT Series 6. How to Read MIL Type Logic Symbols and Truth Tables Table 6-1. MIL Logic Symbols Circuit Logical Equation or Truth Logic Sym bol Function Table 6-1 How to Read MIL Type Logic Symbols Table 6-1 shows the MIL type logic symbols used in high-speed

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD MAC97A6/8 TRIACS LOGIC LEVEL TRIAC . DESCRIPTION 1 Logic level sensitive gate triac intended to be interfaced directly to microcontrollers, logic integrated circuits and other low power gate trigger circuits. SOT-223 FEATURES

LATTICE 3000 family

Abstract: e2cmos technology lattice 22v10 programming GAL20V8 GAL22V10 GAL16V8 GAL20RA10 LATTICE 3000 family architecture
Contextual Info: Lattice Overview among other segments, standard logic, custom-designed application specific integrated circuits ASICs, which include conventional gate-arrays, standard cells and full custom logic circuits , and PLDs. General Lattice Semiconductor Corporation designs, develops

CD74HCT21

Abstract: CD74HC21 CD74HC21E CD74HC21M CD74HCT21E CD74HCT21M CT21 74HCT 74LS
Contextual Info: [ /Title CD74H C21, CD74H CT21 /Subject (High Speed CMOS Logic Dual 4Input CD74HC21, CD74HCT21 Data sheet acquired from Harris Semiconductor SCHS131 High Speed CMOS Logic Dual 4-Input AND Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC21, CD74HCT21, logic gates utilize

Contextual Info: ATV750/L Features • Third Generation Programmable Logic Structure High Density Replacement for Discrete Logic High Speed - Plus a New Low Power Version Increased Logic Flexibility 42 Inputs and 20 SUM terms Flexible Output Logic 20 Flip-Flops -1 0 Extra

NC7SZ57

Contextual Info: Revised April 2000 NC7SZ57 • NC7SZ58 TinyLogic UHS Universal Configurable 2-Input Logic Gates General Description Features The NC7SZ57 and the NC7SZ58 are Universal Configurable 2-Input Logic Gates. Each device is capable of being configured for 1 of 5 unique 2-input logic functions.

NC7SZ57L6X

Abstract: 2 input XNOR GATE z58 diode NC7SZ57 NC7SZ57P6X NC7SZ58 NC7SZ58L6X NC7SZ58P6X SC70-6
Contextual Info: Revised May 2002 NC7SZ57 • NC7SZ58 TinyLogic UHS Universal Configurable 2-Input Logic Gates General Description Features The NC7SZ57 and the NC7SZ58 are Universal Configurable 2-Input Logic Gates. Each device is capable of being configured for 1 of 5 unique 2-input logic functions.

Contextual Info: Specifications ispLSI and pLS11048 Lattice ispLSI and pLSI 1048 ;Semiconductor I Corporation High-Density Programmable Logic Features Functional Block Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, Ten Dedicated Inputs — 288 Registers

THX 201

Abstract: PA7572 "Programmable Electrically Erasable Logic Array" loadable counter with timing diagram PA7572P-20 PA7572F-20
Contextual Info: PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cell - D,T and JK registers with special features

ISPLSI3320-70LQ N

Contextual Info: Specifications ispLSI and pLSI 1048C Lattice ispLSI and pLSI 1048C ;Semiconductor I Corporation High-Density Programmable Logic Features Functional Block Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output

ICT Peel

Abstract: PA7572
Contextual Info: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cell - D,T and JK registers with special features

ksd 9700

Abstract: 5A0B e729 D2B2 ne5522 E93D CP 8113 5b1c 7900 80pin diode 36b3
Contextual Info: CXD2719Q Single-Chip Dolby Pro Logic Surround Decoder Description The CXD2719Q is a CMOS LSI developed for Dolby Pro Logic Surround. A SRAM for short delay and AD/DA converters are built in, and all functions necessary for Dolby Pro Logic Surround such as an

Contextual Info: PROTECTED QUAD POWER DRIVERS U D x2547B Providing interface between low-level logic and power loads, the UDK/UDN/UDQ2547B and UDK/UDN/UDQ2547EB quad power drivers combine logic gates and high-current bipolar outputs with complete output protection. Each of the four outputs will sink 600 mA

isplsi device layout

Contextual Info: Lattice ispLSr and pLSF 2064V \Semiconductor High Density Programmable Logic I Corporation Features Functional Block Diagram HIGH DENSITY PROGRAMMABLE LOGIC — — — — — 2000 PLD Gates 64 and 32 I/O Pin Versions, Four Dedicated Inputs 64 Registers High Speed Global Interconnect

DM024

Abstract: oti 2168 CM17B transistor bf 175
Contextual Info: 5304804 LSI LOGIC □□mb7A LCA300K G ate Array 5 V olt Series P roducts D atabook Oct ober 1993 f 55b 5304604 0014b7T 4^2 * L L C Preface The LCA300K Gate Array Product Series Databook is written for logic and system designers who wish to use LSI Logic’s 0.6-micron gate

NC7SZ57

Contextual Info: Preliminary Revised February 2000 NC7SZ57 • NC7SZ58 TinyLogic UHS Universal Configurable 2-Input Logic Gates Preliminary General Description Features The NC7SZ57 and the NC7SZ58 are Universal Configurable 2-Input Logic Gates. Each device is capable of

Contextual Info: inteT ra y © T [PlfilEWDÜ M85C090 900-GATE CHMOS 24-MACROCELL EPLD High-Performance LSI Semi-Custom Logic Alternative to Low-End Gate Arrays, TTL, 54HC SSI and MSI Logic, and PLDs Programmable Output Registers; Can be Configured as D, T, SR, or JK Types

Contextual Info: intei’ pm M85C060 600-GATE CHMOS 16-MACROCELL EPLD High-Performance LSI Semi-Custom Logic Alternative to Low-End Gate Arrays, TTL, 54HC SSI and MSI Logic, and PLDs Programmable Output Registers; Can be Configured as D, T, SR, or JK Types High-Speed Upgrade to EP600, EP610

Contextual Info: QUAD DARLINGTON POWER DRIVER Combining logic gates and high-current bipolar outputs, the WDN2544B quad Darlington power driver provides an interface between low-level logic circuitry and high-power loads. Each of the four outputs can sink up to 1.fi A in the ON state with peak inrush

Contextual Info: ATV5000/L Features • • • • • • Advanced Programmable Logic Device - High Gate Utilization Flexible Interconnect Architecture - Universal Routing Flexible Logic Cells -128 Flip-Flops and 52 Latches Multiple Flip-Flop Types - Synchronous or Asynchronous Registers

CD54HC21

Abstract: CD54HC21F3A CD74HC21 CD74HC21E CD74HC21M CD74HC21M96 CD74HCT21 CT21
Contextual Info: [ /Title CD74H C21, CD74H CT21 /Subject (High Speed CMOS Logic Dual 4Input CD54HC21, CD74HC21, CD74HCT21 Data sheet acquired from Harris Semiconductor SCHS131B High-Speed CMOS Logic Dual 4-Input AND Gate August 1997 - Revised May 2003 Features Description

Contextual Info: [ /Title CD74H C21, CD74H CT21 /Subject (High Speed CMOS Logic Dual 4Input CD54HC21, CD74HC21, CD74HCT21 Data sheet acquired from Harris Semiconductor SCHS131C High-Speed CMOS Logic Dual 4-Input AND Gate August 1997 - Revised September 2003 Features Description