AH R0A Search Results

Contextual Info: PARADIGM TECHNOLOGY INC PARADIGM H'lE D feTMlO^O 0000Q33 0 256K Static RAM 32K x 8-Bit PDM 41256S PDM 41256L Features Description □ High speed access times Com'l: 1 5 ,1 7 ,2 0 ,2 5 ,3 5 and 45ns M il: 2 0 ,2 5 ,3 5 ,4 5 , and 55ns □ Low power operation

AY8930

Abstract: 8910A
Contextual Info: MICROCHIP TECHNOLOGY INC 22E D blG3201 0 0 0 4 ^ 1 & Microchip 4 • - AY8930 Enhanced Programmable Sound Generator FEATURES PIN CONFIGURATION 40 LEAD DUAL INLINE AY8930 • Two Modes Available On-Chip - AY8930 Expanded Mode - AY38910A-Compatible Mode • Improved Frequency Range

crt monitor circuit diagram

Abstract: CR25 resistor 2 way video splitter circuit diagram crt monitor block diagram CR20 Chip Resistors sparkle diode B4E RESISTOR CR25 b1c diode high voltage CRT transformer
Contextual Info: a 192-Bit, 360 MHz True-Color Video DAC with Onboard PLL ADV7129 FEATURES 192-Bit Pixel Port Allows 2048 ؋ 2048 ؋ 24 Screen Resolution 360 MHz, 24-Bit True-Color Operation Triple 8-Bit D/A Converters 8:1 Multiplexing Onboard PLL RS-343A/RS-170 Compatible Analog Outputs

Contextual Info: 192-Bit, 360 MHz True-Color Video DAC with Onboard PLL ADV7129 a FEATURES 192-Bit Pixel Port Allows 2048 ؋ 2048 ؋ 24 Screen Resolution 360 MHz, 24-Bit True-Color Operation Triple 8-Bit D/A Converters 8:1 Multiplexing Onboard PLL RS-343A/RS-170 Compatible Analog Outputs

d4516161

Abstract: NEC 1216 D451616 4516161 IC-3394 ba6x T8836 D4516161GS d4516 UPD4516161
Contextual Info: PRELIMINARY DATA SHEET NEC MOS INTEGRATED CIRCUIT ¿¿PD4516421, 4516821, 4516161 16M-bit Synchronous DRAM Description The /¿PD4516421, 4516821, 4516161 are high-speed 16,777,216-bit synchronous dynamic random-access memories, organized as 2,097,152x4x2, 1,048,576x8x2 and 524,288x16x2 wordxbitxbank , respectively.

g2e 187

Abstract: 2 way video splitter circuit diagram 220 r3d ADV7129 ADV7129KS CR14 RS-343A gr04 C2215 R2E 190
Contextual Info: 192-Bit, 360 MHz True-Color Video DAC with Onboard PLL ADV7129 a FEATURES 192-Bit Pixel Port Allows 2048 ؋ 2048 ؋ 24 Screen Resolution 360 MHz, 24-Bit True-Color Operation Triple 8-Bit D/A Converters 8:1 Multiplexing Onboard PLL RS-343A/RS-170 Compatible Analog Outputs

ttl 74 181

Abstract: 40C40B
Contextual Info: BACK 192-Bit, 360 MHz True-Color Video DAC with Onboard PLL ADV7129 a FEATURES 192-Bit Pixel Port Allows 2048 ؋ 2048 ؋ 24 Screen Resolution 360 MHz, 24-Bit True-Color Operation Triple 8-Bit D/A Converters 8:1 Multiplexing Onboard PLL RS-343A/RS-170 Compatible Analog Outputs

AKR 121

Abstract: 4564821G5 A7 RFTA
Contextual Info: PRELIMINARY DATA SHEET NEC MOS INTEGRATED CIRCUIT juPD4564421, 4564821 64M-bit Synchronous DRAM 2-bank, LVTTL Description The /iPD4564421,4564821 are high-speed 67,108,864-bit synchronous dynamic random-access memories, organized as 8,388,608x4x2 and 4,194,304x8x2 wordxbitxbank , respectively.

Contextual Info: DATA SHEET NEC/ MOS INTEGRATED CIRCUIT _ /iiPD4516421-PC, 4516821-PC, 4516161-PC 16M-bit Synchronous DRAM for PC SDRAM Lite D e s c rip tio n The ¿¿PD4516421-PC, 4516821-PC, 4516161-PC are high-speed 16,777,216-bit synchronous dynamic randomaccess memories, organized as 2,097,152 x 4 x 2 , 1,048,576 x 8 x 2 and 524,288 x 1 6 x 2 word x bit x bank ,

DS4412

Abstract: DS4412U
Contextual Info: Rev 1; 10/08 Dual-Channel, I2C Adjustable Sink/Source Current DAC The DS4412 contains two I2C adjustable-current DACs that are each capable of sinking or sourcing current. Each output has 15 sink and 15 source settings that are programmed by I2C interface. The full-scale range and step

S132C

Abstract: TM248CBK32S TM124BBK32S TM124BBK32 TM248CBK32 TM248CBK32U
Contextual Info: TM124BBK32, TM124BBK32S1 048 576 BY 32-BIT DYNAMIC RAM MODULE TM248CBK32, TM248CBK32S 2 097152 BY 32-BIT DYNAMIC RAM MODULE SMMS132C-JANUARY1991-REVISED DECEMBER 1992 * Performance Ranges: Organization TM124BBK32 . . . 1 048 576 x 32 TM248CBK32 . . . 2 097 152 x 32

AH R0A

Abstract: DS4412 DS4412U
Contextual Info: Rev 0; 9/07 Dual-Channel, I2C Adjustable Sink/Source Current DAC The DS4412 contains two I2C adjustable-current DACs that are each capable of sinking or sourcing current. Each output has 15 sink and 15 source settings that are programmed by I2C interface. The full-scale range and step

Contextual Info: Rev 1; 10/08 Dual-Channel, I2C Adjustable Sink/Source Current DAC The DS4412 contains two I2C adjustable-current DACs that are each capable of sinking or sourcing current. Each output has 15 sink and 15 source settings that are programmed by I2C interface. The full-scale range and step

Intel i7 MTBF

Contextual Info: in te l 28F008SA 8-MBIT 1-MBIT x 8 F la s h F ile T M MEMORY Extended Temperature Specifications Included High-Density Symmetrically-Blocked Architecture — Sixteen 64-Kbyte Blocks Extended Cycling Capability — 100,000 Block Erase Cycles — 1.6 Million Block Erase

AY8930

Abstract: AY-3-8910A AY38910A AY389 AY3-8910A LTS 6-NP AY-389
Contextual Info: AY8930 M icrochip Enhanced Programmable Sound Generator FEATURES PIN C O N FIG U R A TIO N 4 0 L E A D D U A L IN LIN E • T w o M o de s A v a ila b le O n -C h ip A Y 8930 - A Y 8 9 3 0 E xp a n d e d M o de - A Y 3 8 9 1 0 A -C o m p a tib le M ode • Im p ro ve d F re q u e n cy R ange

tef 6624

Abstract: SEG382 Hitachi DSA002733 1301H
Contextual Info: HD66763 384-channel Segment Driver with Internal RAM for 256-color Displays Rev.1.0 July, 2001 Description The HD66763, 384-channel segment driver LSI, displays 128RGB-by-176-dot graphics on STN displays in 256 colors. It is for driving STN color LCD displays to a maximum of 128RGB by 176

TRACTION MOTOR GE 763

Contextual Info: Series ITS MIL-DTL-5015 Type Reverse Bayonet Connectors Over 200 Power and Signal Insert Arrangements PLUS: Connector Accessories and Assembly Tools United States  United Kingdom  Germany  France  Nordic  Italy  Spain  Japan SERIES ITS

smooth l 7251 3.1

Abstract: gk71 tef 6624 l 7251 wd S-E26 GK 105 Hitachi DSAUTAZ006 SEG270 gk43 c 1060
Contextual Info: —PRELIMINARY— HD66763 384-channel Segment Driver with Internal RAM for 256-color Displays n o ti Preliminary Specification Rev.0.4 January, 2001 a c fi i c e Description Sp The HD66763, 384-channel segment driver LSI, displays 128RGB-by-176-dot graphics on STN

RP105N101B

Contextual Info: RP105x SERIES Low Voltage 400mA LDO Regulator NO.EA-179-131016 OUTLINE The RP105x Series are 400mA output type CMOS-based voltage regulator ICs with capability of low input voltage Min. 0.9V and low output voltage (Min. 0.6V). These ICs are remarkably improved the performance at

tlv15441

Abstract: Motorola sc-512 TLV1544 TLV1544C TLV1544I TLV1548 TLV1548C TLV1548I TMS320
Contextual Info: TLV1544C, TLV1544I, TLV1548C, TLV1548I LOW-VOLTAGE 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 4/8 ANALOG INPUTS S L A S 1 3 9 A -D E C E M B E R 1 9 9 6 -R E V IS E D D E C EM BE R 1996 • • Conversion Time < 10 as 10-Bit-Resolution ADC

UPD6600

Abstract: PD6600A ASR10 PC10
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD67B, 68B 4-BIT SINGLE-CHIP MICROCONTROLLERS FOR INFRARED REMOTE CONTROL TRANSMISSION DESCRIPTION With their 1.65 V low-voltage operation, carrier generator for infrared remote control transmission, standby release function through key input, and programmable timer, the µPD67B and 68B are ideal for infrared remote

68b resistor code

Abstract: ASR10 PC10 PD6600A
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD67B, 68B 4-BIT SINGLE-CHIP MICROCONTROLLERS FOR INFRARED REMOTE CONTROL TRANSMISSION DESCRIPTION With their 1.65 V low-voltage operation, carrier generator for infrared remote control transmission, standby release function through key input, and programmable timer, the µPD67B and 68B are ideal for infrared remote

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD67, 68, 69 4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION DESCRIPTION With their 2.0 V low-voltage operation, carrier generator for infrared remote control transmission, standby release function through key input, and programmable timer, the µPD67, 68, and 69 are ideal for infrared remote control

nec eric-2

Abstract: UPD481
Contextual Info: PRELIMINARY DATA SHEET NEC / MOS INTEGRATED CIRCUIT ¿¿PD4 8 1 8 5 0 8 M-bit Synchronous GRAM for Rev.L Description The /jPD 481 850 is a synchrono us graphics m em o ry SG R AM organized as 131,072 w ords x 32 b its x 2 banks random access port. T his device can ope rate up to 100 M Hz b y using synchronous interface.