AESB Search Results

MST001

Abstract: 17105-3608 tyco tyco 17105-3608 0167j 165063 aa6651
Contextual Info: W tö ö ö T fo R PUBLICATION TH IS M U W lU e 15 U N W JB U 5 H E B . com ent W TYPO ELECTRONICS CORPORATOR - LOC AU. RIÖWT3 AESBtÆD. WST 1 REVISIONS GP 00 “tnr T srr T B IT 20M AR07 RG b esc w ptw n DO <4.8 0.1903 - < 6 .8 —- h— C 0 .8 6 9 ])

fm h52

Contextual Info: SSI 32R2041RW m m s u s fm ts A TDK Group/Company 4, 6-Channel, Two-Terminal Read/Write Device September 1994 DESCRIPTION FEATURES The SSI 32R2041 RW Read/Write device is a bipolar monolithic integrated circuit designed for use with twoterminal thin-film recording heads. It provides a low

Contextual Info: SSI 32R2220RW ¿¡¡kmsustans’ +5V, 2-, 4-Channel Thin Film Read/Write Device A TDK Group/Company Advance Information February 1995 DESCRIPTION FEATURES The SSI 32R2220RW is a BiCMOS m onolithic integrated circuit designed for use with two-terminal recording heads. It provides a low noise read amplifier,

viterbi algorithm

Contextual Info: ABRIDGED VERSION AI SSI 34P3500 w m PRML Read Channel with PR4, 8/9 ENDEC, FWR Servo s ifs k tn s A TDK G roup/Company Advance Information December 1995 DESCRIPTION FEATURES The SSI 34P3500 is a high performance BiCMOS read channel 1C that provides all of the functions needed to

80C196 instruction set

Abstract: spindle and VCM motor controller 68HG16 spindle motor VCM controller 64 12v Dual mode disk drive spindle and VCM motor driver
Contextual Info: SSI 32H6814 5V Servo/Motor Speed Driver m m s u ib n s ' A TDK Group/Company Preliminary Data October 1994 DESCRIPTION FEATURES The SSI 32H6814 Servo/MSC Driver is a CMOS monolithic integrated circuit housed in a 64-lead TQFP package which operates from a single 5V supply. It

RT3PE600L

Abstract: RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1
Contextual Info: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging

ACTEL FUSION AFS1500

Abstract: FlashPro3 PQ208 QN108 QN180 M1AFS1500 AFS250 rc oscillator M-LVDS
Contextual Info: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator

Advanced Boot Block Flash

Abstract: AES-128 CS201 CS281 CS289 AGLP125
Contextual Info: v1.5 IGLOO PLUS Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

A3P600

Abstract: A3P060 A3P1000 A3P125 A3P250 AECQ100 AEC-Q100 FG144 FG256 FG484
Contextual Info: v1.0 Automotive ProASIC3 Flash Family FPGAs Features and Benefits Low Power • 1.5 V Core Voltage • Support for 1.5-V-Only Systems • Low-Impedance Flash Switches High-Temperature AEC-Q100–Qualified Devices • Grade 2 105°C TA 115°C TJ • Grade 1 125°C TA (135°C TJ)

A3PE3000L FG484

Abstract: Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y
Contextual Info: v1.3 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for

QN68

Abstract: VQ100 actel part markings
Contextual Info: Advance v0.4 ProASIC®3 nano Flash FPGAs Features and Benefits Advanced I/Os Wide Range of Features • 10 k to 250 k System Gates • Up to 36 kbits of True Dual-Port SRAM • Up to 71 User I/Os Reprogrammable Flash Technology • • • • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS Process

CORE8051

Abstract: FlashPro3 AES-128 FG256 PQ208 ac motor variable speed control rc oscillator
Contextual Info: Preliminary v0.4 Actel Fusion Mixed-Signal FPGA for the MicroBlade Advanced Mezzanine Card Solution Features and Benefits • Targeted to Advanced Mezzanine Card AdvancedMC Designs • Designed in Partnership with MicroBlade • 8051-Based Module Management Controller (MMC)

RT3PE3000L

Abstract: RT3PE600L LG484 AES-128 ieee 1532 ProASIC3
Contextual Info: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging

AFS600-FG256

Abstract: zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180
Contextual Info: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator

8052 AH Basic

Abstract: 2 pin crystal oscillator 11.0592 mhz 8052 microcontroller instruction set 033H pre fetch 1994
Contextual Info: SSI 73M2910/291OA Microcontroller ¿ é m M Îa tis A TDK Group/Company December 1994 FEATURES DESCRIPTION The Silicon Systems 73M2910 high performance microcontroller is based on the industry standard 8-bit 8052 implemented in Silicon Systems’ advanced

in 4742A

Abstract: 4742A S253c capacitor 9013 npn 32P4742A PDCR 143
Contextual Info: SSI 32P4742/4742A/4746/4746A Read Channel with 1,7 ENDEC, 4-burst Servo Sam M bns A TDK G roup/C om pany Advance Information January 1995 D E S C R IP T IO N FEATURES The SSI 32P4742/4742A/4746/4746A devices are high performance BiCMOS single chip read channel

QN68

Abstract: VQ100 PAC11 ProASIC3 handbook
Contextual Info: Advance v0.5 ProASIC®3 nano Flash FPGAs Features and Benefits Advanced I/Os Wide Range of Features • 10 k to 250 k System Gates • Up to 36 kbits of True Dual-Port SRAM • Up to 71 User I/Os Reprogrammable Flash Technology • • • • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS Process

AES-128

Abstract: FG256 FG484
Contextual Info: v2.0 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power

A54 ZENER

Abstract: AFS600-FG256 mark AT0 QN108 CORE8051 bipolar ROM
Contextual Info: v2.0 Actel Fusion Family of Mixed-Signal FPGAs Features and Benefits In-System Programming ISP and Security High-Performance Reprogrammable Flash Technology Advanced Digital I/O • • • • • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents

RRUS 01 B2

Abstract: RRUS 32 b2 RRUS 01 d 2037
Contextual Info: CS8406 192 kHz Digital Audio Interface Transmitter Features General Description  Complete EIAJ CP1201, IEC-60958, AES3, The CS8406 is a monolithic CMOS device which encodes and transmits audio data according to the AES3, IEC60958, S/PDIF, o r EIAJ CP1201 standards. The

dimond max 21

Abstract: varispeed -616PC5/616P5 CDB8427 CP1201 CS8427 CS8427-CS CS8427-CZ CS8427-IS CS8427-IZ IEC-60958
Contextual Info: CS8427 96 kHz Digital Audio Interface Transceiver Features General Description l The CS8427 is a stereo digital audio transceiver with AES3 and serial digital audio inputs, AES3 and serial digital audio outputs, along with comprehensive control ability through a 4-wire microcontroller port. Channel status and user data are assembled in block sized buffers,

82C89

Abstract: 5 pin reset ic ARB 031t
Contextual Info: HARRIS SEHICOND SECTOR IS C e 1 4 3 D 5 2 7 1 00110L1 8 I ” S'S -3 3 -0 3 82C89 HARRIS CMOS Bus Arbiter Features Pinouts • Pin C om p a tib le w ith B ipo lar 8289 T O P V IE W • S caled S A JI IV C M O S Process S2C • Lo w P o w er O p era tio n

ARMv6

Abstract: cortex a15 core Cortex-m1 Cortex R4 TRANSISTOR ww1 AES-128 FG256 FG484 T8 851
Contextual Info: v1.2 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power

CPLD

Abstract: CS-289
Contextual Info: Revision 14 IGLOO PLUS Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode