ADP71 Search Results

Contextual Info: –28 V, −200 mA, Low Noise, Linear Regulator ADP7182 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS CIN 2.2µF GND VIN = –8V ON OFF –2V VIN VOUT = –5V VOUT ADP7182 2V EN 0V NC ON Figure 1. ADP7182 with Fixed Output Voltage, VOUT = −5 V CIN 2.2µF

Contextual Info: 40 V, 200 mA, Low Noise, CMOS LDO Linear Regulator ADP7142 Data Sheet TYPICAL APPLICATION CIRCUITS VIN = 6V CIN 2.2µF ADP7142 VIN VOUT VOUT = 5V COUT 2.2µF SENSE/ADJ ON EN OFF SS GND CSS 1nF 11848-001 Low noise: 11 V rms independent of fixed output voltage

Contextual Info: –28 V, −200 mA, Low Noise, Linear Regulator ADP7182 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS GND VIN = –8V ON OFF –2V VOUT = –5V VOUT ADP7182 2V EN 0V NC ON CIN 2.2µF COUT 2.2µF GND ON VIN 2V 0V VOUT 13kΩ 40.2kΩ VOUT = –5V ADP7182

Contextual Info: ADP7112CB-EVALZ User Guide UG-777 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the ADP7112 Low Noise, CMOS LDO Linear Regulator FEATURES GENERAL DESCRIPTION

Contextual Info: Preliminary Technical Data 20 V, 200 mA, Low Noise, CMOS LDO ADP7118 FEATURES Low Noise: 11 µVRMS independent of fixed output voltage PSRR of 83 dB @ 10 KHz, 68 dB @ 100 KHz, 50 dB @ 1 MHz, VOUT ≤5V, VIN = 7V Input voltage range: 2.7 V to 20 V Maximum output current: 200 mA

Contextual Info: 20 V, 300 mA, Low Noise, CMOS LDO ADP7102 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS VIN = 8V CIN + 1µF VIN VOUT VOUT = 5V + COUT 1µF SENSE R1 100kΩ ON OFF R2 100kΩ RPG 100kΩ EN/ UVLO PG PG 09506-001 GND Figure 1. ADP7102 with Fixed Output Voltage, 5 V

Contextual Info: 20 V, 500 mA, Low Noise, CMOS LDO ADP7104 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS VIN = 8V CIN + 1µF VIN VOUT SENSE ON OFF 100kΩ VOUT = 5V + COUT 1µF 100kΩ EN/ UVLO PG PG 100kΩ 09507-001 GND Figure 1. ADP7104 with Fixed Output Voltage, 5 V

ADP7118

Abstract: ADP7118ACPZN
Contextual Info: 20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator ADP7118 Data Sheet TYPICAL APPLICATION CIRCUITS VIN = 6V CIN 2.2µF ADP7118 VIN VOUT VOUT = 5V COUT 2.2µF SENSE/ADJ ON EN OFF SS GND CSS 1nF 11849-001 Low noise: 11 V rms independent of fixed output voltage

Contextual Info: 20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator ADP7112 Data Sheet TYPICAL APPLICATION CIRCUITS VIN = 6V CIN 2.2µF ADP7112 VIN VOUT VOUT = 5V COUT 2.2µF SENSE/ADJ ON EN OFF SS GND CSS 1nF 12508-001 Low noise: 11 V rms independent of fixed output voltage

adp7112

Contextual Info: 20 V200 mA、低噪声 CMOS LDO线性稳压器 ADP7112 产品特性 典型应用电路 低噪声：11 V rms，与固定输出电压无关 电源抑制比 PSRR ：88 dB (10 kHz)、68 dB (100 kHz)、 50 dB (1 MHz)(VOUT = 5 V，VIN = 7 V) 输入电压范围：2.7 V至20 V

Contextual Info: –28 V, −200 mA, Low Noise, Linear Regulator ADP7182 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS GND VIN = –8V ON OFF –2V VIN VOUT = –5V VOUT ADP7182 2V EN 0V NC ON Figure 1. ADP7182 with Fixed Output Voltage, VOUT = −5 V CIN 2.2µF COUT 2.2µF

Contextual Info: 20 V, 300 mA, Low Noise, CMOS LDO ADP7102 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS VIN = 8V CIN + 1µF VIN VOUT VOUT = 5V + COUT 1µF SENSE R1 100kΩ ON OFF R2 100kΩ RPG 100kΩ EN/ UVLO PG PG 09506-001 GND Figure 1. ADP7102 with Fixed Output Voltage, 5 V

Contextual Info: Preliminary Technical Data 40 V, 200 mA, Low Noise, CMOS LDO ADP7142 TYPICAL APPLICATION CIRCUITS FEATURES Low Noise: 11 µVRMS independent of fixed output voltage PSRR of 83 dB @ 10 KHz, 68 dB @ 100 KHz, 50 dB @ 1 MHz, VOUT ≤5V, VIN = 7V Input voltage range: 2.7 V to 40 V

ADP7182

Abstract: Ceramic capacitors 100nf
Contextual Info: –28 V, −200 mA, Low Noise, Linear Regulator ADP7182 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS GND VIN = –8V ON OFF –2V VIN VOUT = –5V VOUT ADP7182 2V EN 0V NC ON Figure 1. ADP7182 with Fixed Output Voltage, VOUT = −5 V CIN 2.2µF COUT 2.2µF

ADP7182

Contextual Info: –28 V, −200 mA, Low Noise, Linear Regulator ADP7182 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS GND VIN = –8V ON OFF –2V VIN VOUT = –5V VOUT ADP7182 2V EN 0V NC ON Figure 1. ADP7182 with Fixed Output Voltage, VOUT = −5 V CIN 2.2µF COUT 2.2µF

Contextual Info: 20 V, 500 mA, Low Noise, CMOS LDO ADP7104 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS VIN = 8V CIN + 1µF VIN VOUT SENSE ON OFF R1 100kΩ VOUT = 5V + COUT 1µF RPG 100kΩ EN/ UVLO R2 100kΩ PG PG 09507-001 GND Figure 1. ADP7104 with Fixed Output Voltage, 5 V

ADP7182

Contextual Info: –28 V, −200 mA, Low Noise, Linear Regulator ADP7182 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS CIN 2.2µF GND VIN = –8V ON –2V VOUT = –5V VOUT VIN ADP7182 2V NC EN 0V OFF ON Figure 1. ADP7182 with Fixed Output Voltage, VOUT = −5 V COUT 2.2µF

Contextual Info: 20 V, 500 mA, Low Noise, CMOS LDO ADP7104 Data Sheet FEATURES TYPICAL APPLICATION CIRCUITS VIN = 8V CIN + 1µF VIN VOUT SENSE ON OFF 100kΩ VOUT = 5V + COUT 1µF 100kΩ EN/ UVLO PG PG 100kΩ 09507-001 GND Figure 1. ADP7104 with Fixed Output Voltage, 5 V

ADAS3022

Abstract: CP4015
Contextual Info: 16-Bit, 1 MSPS, 8-Channel Data Acquisition System ADAS3022 Data Sheet FEATURES and buffer; and a 16-bit charge redistribution analog-to-digital converter ADC with successive approximation register (SAR) architecture. The ADAS3022 can resolve eight single-ended

Device-List

Abstract: cf745 04 p 24LC211 lattice im4a3-32 CF775 MICROCHIP 29F008 im4a3-64 ks24c01 ep320ipc ALL-11P2
Contextual Info: Device List Adapter List Converter List for ALL-11 JUL. 2000 Introduction T he Device List lets you know exactly which devices the Universal Programmer currently supports. The Device List also lets you know which devices are supported directly by the standard DIP socket and which

Contextual Info: 12-Bit, 2.5 GSPS/2.0 GSPS, 1.3 V/2.5 V Analog-to-Digital Converter AD9625 Data Sheet FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DRGND AGND REFERENCE DIGITAL INTERFACE AND CONTROL VCM VIN+ VIN– ADC CORE DDC fS/8 OR fS/16 SERDOUT[0]± SERDOUT[1]± SERDOUT[2]± SERDOUT[3]±

Contextual Info: 18-Bit, 5 MSPS PulSAR Differential ADC AD7960 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS REFIN VDD1 VDD2 VIO EN0 EN1 ÷2 CLOCK LOGIC EN2 EN3 IN+ CAP DAC IN– CNV+, CNV– D+, D– SERIAL LVDS SAR AD7960 DCO+, DCO– CLK+, CLK– GND Figure 1.

Contextual Info: 12-Bit, 2.5/2.0 GSPS, 1.3 V/2.5 V Analog-to-Digital Converter AD9625 Preliminary Data Sheet FUNCTIONAL BLOCK DIAGRAM AGND REFERENCE DRVDD DRGND DIGITAL INTERFACE AND CONTROL VCM VIN+ VIN– ADC CORE DDC fS/8 OR fS/16 SERDOUT[0]± SERDOUT[1]± SERDOUT[2]±

Contextual Info: 18-Bit, 5 MSPS PulSAR Differential ADC AD7960 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS REFIN VIO EN0 EN1 ÷2 CLOCK LOGIC EN2 EN3 IN+ CAP DAC IN– CNV+, CNV– D+, D– SERIAL LVDS SAR AD7960 DCO+, DCO– CLK+, CLK– GND Figure 1. GENERAL DESCRIPTION