2006 - Not Available
Abstract: No abstract text available
Text: the AD9514. The only difference is that the AD9515 has only one LVPECL output, and one LVDS/CMOS , Evaluation Board for AD9513/ AD9514 / AD9515 Clock Distribution ICs AD9513/PCB, AD9514 /PCB, AD9515 , sheet describes the evaluation board for the AD9513, AD9514 , and AD9515 clock distribution ICs. The , DESCRIPTION The AD9513, AD9514 , and AD9515 clock ICs provide multioutput clock distribution in a design that , ), each with 16 steps of fine adjustment. The AD9513/ AD9514 /AD9515 clock ICs do not require an external
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AD9513/AD9514/
AD9515
AD9513/PCB,
AD9514/PCB,
AD9515/PCB
AD9513,
AD9514,
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2005 - AN-501
Abstract: AN-586 AN-756 ZESC-2-11 ZFL1000VH2 PDL30A
Text: operating conditions of the internal blocks of the AD9514. The performance figures given in the , These pins set the operation of the AD9514. The VREF pin provides sufficient drive capability to drive , heat through its exposed paddle. The PCB acts as a heat sink for the AD9514. The PCB attachment must , lowest jitter clock signals available from the AD9514. The LVPECL outputs (because they are open , 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs AD9514 FEATURES 1.6 GHz
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AD9514
Hz/250
rms/290
32-lead
MO-220-VHHD-2
CP-32-2)
AD9514BCPZ
AD9514BCPZ-REEL71
AN-501
AN-586
AN-756
ZESC-2-11
ZFL1000VH2
PDL30A
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2005 - Not Available
Abstract: No abstract text available
Text: the AD9514. The performance figures given in the Specifications section assume that this resistor , AD9514. The VREF pin provides sufficient drive capability to drive as many of the setup pins as , PCB acts as a heat sink for the AD9514. The PCB attachment must provide a good thermal path to a , lowest jitter clock signals available from the AD9514. The LVPECL outputs (because they are open , 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs AD9514 FUNCTIONAL BLOCK
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AD9514
Hz/250
rms/290
32-lead
MO-220-VHHD-2
CP-32-2)
AD9514BCPZ
AD9514BCPZ-REEL71
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Not Available
Abstract: No abstract text available
Text: 9514_quick_start.clk Design Example Description a In this design the AD9514 , 1.6 GHz, 3 , for this example is a clean, low jitter 1.5GHz clock signal. Because the AD9514 offers select integer , =30. Note that the AD9514 does not require a serial port for programming. By consulting the product , specified with high performance, the user can determine the jitter limitation of the AD9514 clock , noise and jitter. The notes and diagrams below describe how to configure the AD9514 for this
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AD9514,
250MHz
150MHz
50MHz
AD9514
780mV
-160dBc/Hz
AD9514
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2008 - ADF4026
Abstract: ADATE207 SERDES 10G AD9512 AD790 adcmp565 AD9910 adcmp605 AD9851 AD9951
Text: AD9514 PLL RS LVPECL /1./32 REF DDS/DAC LVPECL /1./32 /1./32 AD9549 t AD9549 AD9514 (RMS)225 fs DDS (DAC) DAC(IF)DAC DAC (DDS)DDS 32DDS 1 , 5 AD9513 1 1.6 - 3 AD9514 1 1.6 - 3 AD9515 1 1.6 - 2
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ADCMP565/ADCMP566/
ADCMP567
ADCMP561/ADCMP562/
ADCMP563/ADCMP564
ADCMP572/ADCMP573
ADCMP580/ADCMP581/
ADCMP582
ADCMP600/ADCMP601/
ADCMP602/ADCMP603
ADCMP604/ADCMP605/
ADF4026
ADATE207
SERDES 10G
AD9512
AD790
adcmp565
AD9910
adcmp605
AD9851
AD9951
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2006 - ad9970
Abstract: AD7763 AD7796 AD776x PWM32 AD9461 cds 8 AD9460-80 AD7690 AD9230
Text: ° 300 rms LVDS CMOS AD9514 AD9515 LVPECL LVDS/CMOS A/D 225 LVPECL CMOS IC , 300 3 32 LFCSP AD9514 1600/800/250 2 LVPECL 1 LVDS/CMOS 225 3 32
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AD7294
com/jp/AD7294
AD7266
AD7400
10MSPS
ad9970
AD7763
AD7796
AD776x
PWM32
AD9461
cds 8
AD9460-80
AD7690
AD9230
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2006 - AD5664
Abstract: TXDAC AD5360 10-MSOP AD5933 AD5624 AD5624R 10v dac i2c AD5644R AD5663
Text: AD9514 1600/800/250 2 LVPECL1 LVDS/CMOS AD9515 1600/800/250 1 LVPECL1 LVDS/CMOS
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16DAC
16denseDAC
OT-23
18DAC
10LFCSP16D/A
DACAD5664R70
AD5664R1216
10LFCSPMSOP
AD5664R
AD5664
TXDAC
AD5360
10-MSOP
AD5933
AD5624
AD5624R
10v dac i2c
AD5644R
AD5663
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2008 - AD9230BCPZ11-200
Abstract: hsm2812 AN501 "pin-compatible" AD9211 AD9230 AD9230-11 AN-835 ANSI-644 AD923011-200EBZ
Text: AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLK 50* CMOS DRIVER OPTIONAL 0.1µF 100 , : HSM2812 Figure 24. Transformer-Coupled Differential Clock AD9510/AD9511/ AD9512/AD9513/ AD9514 , /AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF 0.1µF CLK+ CLK 0.1µF CLOCK INPUT LVDS , /AD9511/AD9512/AD9513/ AD9514 /AD9515 family of clock drivers offers excellent jitter performance. CLOCK INPUT CLOCK INPUT AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 07101-021 0.1µF
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11-Bit,
AD9230-11
12-BIT
ANSI-644
56-Lead
CP-56-2)
AD9230BCPZ11-200
AD923011-200EBZ1
hsm2812
AN501 "pin-compatible"
AD9211
AD9230
AD9230-11
AN-835
AD923011-200EBZ
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2007 - AD9230-250EBZ
Abstract: AD9211 AD9230 AD9230-170 AD9230-210 AD9230-250 AN-835 ANSI-644 0125P
Text: 50 CLOCK INPUT AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLK 50 1 CMOS , sample clock input pins, as shown in Figure 56. The AD9510/AD9511/AD9512/AD9513/ AD9514 /AD9515 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512/AD9513/ AD9514 , . CLK 50 1 06002-070 CLOCK INPUT 50 1 AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 LVDS , . Single-Ended 3.3 V CMOS Sample Clock 0.1µF 501 0.1µF CLK AD9510/AD9511/ AD9512/AD9513/ AD9514
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12-Bit,
MSPS/210
MSPS/250
AD9230
12-BIT
ANSI-644
170EBZ1
AD9230-210EBZ1
AD9230-250EBZ1
AD9230-250EBZ
AD9211
AD9230
AD9230-170
AD9230-210
AD9230-250
AN-835
0125P
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2007 - HSM2812
Abstract: AD9513 AD9211 AD9211-200 AD9211-250 AD9211-300 AD9230 AN-835 ANSI-644 AD9211BCPZ200
Text: 1WT, 1:1Z 0.1µF XFMR 50 CLOCK INPUT AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF , /AD9513/ AD9514 /AD9515 If a low jitter clock is available, another option is to ac couple a , /AD9513/ AD9514 /AD9515 family of clock drivers offers excellent jitter performance. 100 0.1µF , / AD9514 /AD9515 LVDS DRIVER ADC 0.1µF AD9211 CLK Figure 46. Single-Ended 3.3 V CMOS Sample , Considerations 0.1µF 240 CLK 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 50* 0.1µF
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10-Bit,
MSPS/250
MSPS/300
AD9211
10-BIT
ANSI-644
AD9211BCPZ-200
AD9211BCPZ-2501
AD9211BCPZ-3001
HSM2812
AD9513
AD9211
AD9211-200
AD9211-250
AD9211-300
AD9230
AN-835
AD9211BCPZ200
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2007 - Not Available
Abstract: No abstract text available
Text: INPUT AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLK ADC 0.1µF CLKâ , /AD9511/ AD9512/AD9513/ AD9514 /AD9515 100⦠0.1µF PECL DRIVER Figure 46. Single-Ended 3.3 V , 43. Differential PECL Sample Clock AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLK , ¦ 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 240⦠CLK CMOS DRIVER If a low jitter , pins, as shown in Figure 43. The AD9510/AD9511/AD9512/AD9513/ AD9514 /AD9515 family of clock drivers
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10-Bit,
MSPS/250
MSPS/300
AD9211
10-BIT
ANSI-644
AD9211BCPZ-200
AD9211BCPZ-2501
AD9211BCPZ-3001
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2008 - Not Available
Abstract: No abstract text available
Text: INPUT AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLK OPTIONAL 0.1µF 100⦠50â , AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLK 50â¦* If a low jitter clock is , shown in Figure 25. The AD9510/AD9511/AD9512/AD9513/ AD9514 /AD9515 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLOCK INPUT , / AD9512/AD9513/ AD9514 /AD9515 0.1µF 0.1µF CLK+ CLK 0.1µF CLOCK INPUT LVDS DRIVER
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11-Bit,
AD9230-11
12-BIT
ANSI-644
56-Lead
CP-56-2)
AD9230BCPZ11-200
AD923011-200EBZ1
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2007 - 32-Lead LFCSP footprint
Abstract: ADF4026 adcmp565 programmable rf delay line ADATE207 AD9951 Application Notes AD9910 LFCSP ADCMP567 AD9952 synchronizing
Text: example shows a complete timing solution in which the AD9549 is paired with the AD9514 clock divider , 1 1.6 - 3 AD9514 1 1.6 - 3 AD9515 1 1.6 - 2 AD9516-x
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ADCMP565/ADCMP566/
ADCMP567
ADCMP561/ADCMP562/
ADCMP563/ADCMP564
20-lead
32-lead
16-lead
BR06072-
32-Lead LFCSP footprint
ADF4026
adcmp565
programmable rf delay line
ADATE207
AD9951 Application Notes
AD9910
LFCSP
ADCMP567
AD9952 synchronizing
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2007 - AD9513 packaging
Abstract: No abstract text available
Text: 1 CMOS DRIVER CLK 0.1µF 0.1µF 150 RESISTOR IS OPTIONAL. AD9510/AD9511/ AD9512/AD9513/ AD9514 , CLOCK INPUT 0.1µF CLK 501 AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 OPTIONAL 0.1µF 100 , shown in Figure 56. The AD9510/AD9511/AD9512/AD9513/ AD9514 /AD9515 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 CLOCK INPUT 0.1µF CLK PECL , 56. Differential PECL Sample Clock CLOCK INPUT 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514
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12-Bit,
MSPS/210
MSPS/250
AD9230
ANSI-644
AD9230-250
AD9230-170
AD9233-125
AD9233-105
AD9236
AD9513 packaging
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2009 - Not Available
Abstract: No abstract text available
Text: RESISTORS ARE OPTIONAL. Figure 44. Differential PECL Sample Clock AD9510/AD9511/ AD9512/AD9513/ AD9514 , clock input pins as shown in Figure 44. The AD9510/ AD9511/AD9512/AD9513/ AD9514 /AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512/AD9513/ AD9514 , Figure 43. Transformer-Coupled Differential Clock CLK+ AD9510/AD9511/ AD9512/AD9513/ AD9514 , OPTIONAL 100 CMOS DRIVER 0.1µF ADT1-1WT, 1:1Z 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514
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12-Bit,
MSPS/210
AD9639
AD9639BCPZ-170
AD9639BCPZRL-170
AD9639BCPZ-210
AD9639BCPZRL-210
AD9639-210KITZ
72-Lead
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2008 - Not Available
Abstract: No abstract text available
Text: AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 0.1µF CLK+ 0.1µF CLK+ CLK , sample clock input pins as shown in Figure 53. The AD9510/ AD9511/AD9512/AD9513/ AD9514 /AD9515/AD9516 , /AD9513/ AD9514 /AD9515/ AD9516/AD9518 CLK 50â¦* Figure 52. Transformer-Coupled Differential , / AD9514 /AD9515/ AD9516/AD9518 ADC AD9239 CLKâ 0.1µF ADC AD9239 SCHOTTKY DIODES: HSM2812 , /AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 06980-021 For optimum performance, the
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AD9239
AD9239BCPZ-170
AD9239BCPZ-210
AD9239BCPZ-250
AD9239-250KITZ
72-Lead
CP-72-3
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2008 - pn sequence generator
Abstract: ADT1-1WT-1 6462D ad9239bcpz-210 HSM2812 INVERTER TRANSFORMER 101 sine wave inverter using pic AN-835 AD9239 D40P3
Text: + CLK 0.1µF CLK AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 LVDS DRIVER , Figure 53. The AD9510/ AD9511/AD9512/AD9513/ AD9514 /AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 CLK , Differential Clock 0.1µF ADC AD9239 CLK 0.1µF CLK+ AD9510/AD9511/ AD9512/AD9513/ AD9514 , / AD9514 /AD9515/ AD9516/AD9518 06980-021 For optimum performance, the AD9239 sample clock inputs
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12-Bit,
MSPS/210
MSPS/250
AD9239
CP-72-3)
AD9239BCPZ-170
AD9239BCPZ-210
AD9239BCPZ-250
AD9239-250KITZ
pn sequence generator
ADT1-1WT-1
6462D
ad9239bcpz-210
HSM2812
INVERTER TRANSFORMER 101
sine wave inverter using pic
AN-835
AD9239
D40P3
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2008 - 6462D
Abstract: AD9239BCPZ-210 AN-835
Text: + CLK 0.1µF CLK AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 LVDS DRIVER , Figure 53. The AD9510/ AD9511/AD9512/AD9513/ AD9514 /AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 CLK , Differential Clock 0.1µF ADC AD9239 CLK 0.1µF CLK+ AD9510/AD9511/ AD9512/AD9513/ AD9514 , / AD9514 /AD9515/ AD9516/AD9518 06980-021 For optimum performance, the AD9239 sample clock inputs
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12-Bit,
MSPS/210
MSPS/250
AD9239
CP-72-3)
AD9239BCPZ-170
AD9239BCPZ-2101
AD9239BCPZ-2501
AD9239-250KITZ1
6462D
AD9239BCPZ-210
AN-835
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2007 - NRC10ZOTRF
Abstract: HSM2812 NRC04ZOTRF AD9601-200 AD9601-250 AD9626 AN-835 JOHNSON142 balun transformer NC7WZ07P6
Text: 0.1µF XFMR 50 CLOCK INPUT AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLK 50 , / AD9514 /AD9515 100 0.1µF CLK AD9601 CLK 07100-012 240 Figure 37. Differential PECL Sample Clock AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLK+ CLK 100 0.1µF CLK 50 , /AD9513/ AD9514 /AD9515 50* 0.1µF 50* If a low jitter clock is available, another option is to , AD9510/AD9511/AD9512/AD9513/ AD9514 /AD9515 family of clock drivers offers excellent jitter performance
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10-Bit,
MSPS/250
AD9601
56-Lead
CP-56-2)
AD9601BCPZ-200
AD9601BCPZ-2501
AD9601-250EBZ1
NRC10ZOTRF
HSM2812
NRC04ZOTRF
AD9601-200
AD9601-250
AD9626
AN-835
JOHNSON142
balun transformer
NC7WZ07P6
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2006 - Not Available
Abstract: No abstract text available
Text: DIODES: HSM2812 AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLKâ CLK 50â¦1 , shown in Figure 41. The AD9510/ AD9511/AD9512/AD9513/ AD9514 /AD9515 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLKâ 150â , Sample Clock AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 0.1µF CLK+ CLKâ CLK+ LVDS , . Mini-Circuits® ADT1-1WT, 1:1Z 0.1µF XFMR 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515
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14-Bit,
AD9252
AD9252
AN-877
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2008 - Not Available
Abstract: No abstract text available
Text: / AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 0.1µF CLK+ 0.1µF CLK+ CLK 0.1µF CLKâ , Figure 53. The AD9510/ AD9511/AD9512/AD9513/ AD9514 /AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 , ¦ RESISTOR IS OPTIONAL. CLKâ AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 ADC , + OPTIONAL 100⦠0.1µF 0.1µF 0.1µF 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515
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AD9239
AD9239BCPZ-170
AD9239BCPZ-210
AD9239BCPZ-250
AD9239-250KITZ
72-Lead
CP-72-3
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2008 - Not Available
Abstract: No abstract text available
Text: /AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 0.1µF CLK+ 0.1µF CLK+ CLK 0.1µF , * AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 0.1µF Another option is to ac-couple , / AD9511/AD9512/AD9513/ AD9514 /AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter , 0.1µF ADC AD9239 AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 CLK+ CLK , DRIVER CLK+ 50 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518
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12-Bit,
MSPS/210
MSPS/250
AD9239
AD9239BCPZ-170
AD9239BCPZ-210
AD9239BCPZ-250
AD9239-250KITZ
72-Lead
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2009 - AD9639
Abstract: s31 schottky diode mdac s29 proportional controller 2812 AN-827 AN-835 JESD204 Packaging Top Mark LFCSP AD9516 generic JESD204 radar
Text: PECL Sample Clock AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 0.1µF CLK , pins as shown in Figure 44. The AD9510/ AD9511/AD9512/AD9513/ AD9514 /AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 , 43. Transformer-Coupled Differential Clock CLK+ AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515 , /AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 07973-021 For optimum performance, the
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12-Bit,
MSPS/210
AD9639
endP-72-3)
AD9639BCPZ-170
AD9639BCPZRL-170
AD9639BCPZ-210
AD9639BCPZRL-210
AD9639-210KITZ
AD9639
s31 schottky diode
mdac s29
proportional controller 2812
AN-827
AN-835
JESD204
Packaging Top Mark LFCSP
AD9516 generic
JESD204 radar
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2008 - Not Available
Abstract: No abstract text available
Text: /AD9513/ AD9514 /AD9515/ AD9516/AD9518 CLK 50* CMOS DRIVER CLK 0.1µF 0.1µF *50 RESISTOR IS OPTIONAL. 39k , CMOS Sample Clock AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 CLK 50 * CMOS DRIVER CLK , signal to the sample clock input pins as shown in Figure 53. The AD9510/ AD9511/AD9512/AD9513/ AD9514 , /AD9513/ AD9514 /AD9515/ AD9516/AD9518 CLK PECL DRIVER 0.1µF CLK 50* 50* CLK 240 240 06980-019 Clock , / AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 CLK LVDS DRIVER CLK 50* 50* 06980-020 0.1µF CLK
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12-Bit,
MSPS/210
MSPS/250
AD9239
AD9239
AD9239BCPZ-170
AD9239BCPZ-210
AD9239BCPZ-250
AD9239-250KITZ
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2008 - ADT1-1WT-1
Abstract: AD9239BCPZ-210 AN-835
Text: + CLK 0.1µF CLK AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 LVDS DRIVER , Figure 53. The AD9510/ AD9511/AD9512/AD9513/ AD9514 /AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. 0.1µF AD9510/AD9511/ AD9512/AD9513/ AD9514 /AD9515/ AD9516/AD9518 CLK , Differential Clock 0.1µF ADC AD9239 CLK 0.1µF CLK+ AD9510/AD9511/ AD9512/AD9513/ AD9514 , / AD9514 /AD9515/ AD9516/AD9518 06980-021 For optimum performance, the AD9239 sample clock inputs
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12-Bit,
MSPS/210
MSPS/250
AD9239
CP-72-3)
AD9239BCPZ-170
AD9239BCPZ-210
AD9239BCPZ-250
AD9239-250KITZ
ADT1-1WT-1
AD9239BCPZ-210
AN-835
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