ABAM Search Results

Contextual Info: T1/E1 Primary Rate Specifications Primary Rate Specifications Function DSX-1 DS-1 T1.403 Line Rate C able Length S2 (G.703) (1.431) 1.544 MHz 1.544 MHz 2.048 MHz 2.048 MHz ± 200 B/S ± 75 B/S ± 50 ppm ± 50 ppm ABAM/655 ft 3000/6000 ft 350 m 1000 m (1000 ft)

TAS5611A

Abstract: TAs56 TAS5611APHD 2502W
Contextual Info: TAS5611A SLAS709B – JUNE 2010 – REVISED JULY 2011 www.ti.com 125W STEREO/250W MONO PurePath HD ANALOG-INPUT POWER STAGE Check for Samples: TAS5611A FEATURES APPLICATIONS • • • • • • 23 • • • • • • • • PurePath™ HD Enabled Integrated Feedback

Contextual Info: SSI 78P233A ¿mmsiisíans’ DS-1 Line Interface A TDK Group/Com pany January 1992 DESCRIPTION FEATURES The SSI 78P233A DS-1 Line Interface is a bipolar integrated circuit that provides the interface functions necessary to convert DS-1-level signals to TTL-level

SERVICE MANUAL tv TCL

Abstract: tcl tv 21 schematic diagram tcl tv 21" schematic diagram TV TCL Schematic schematic diagram TCL 29 tv CXT8192 CS61535A CS61535A-IL1 CS61535A-IP1 HP3785A
Contextual Info: CS61535A T1/E1 Line Interface Features General Description • The CS61535A combines the complete analog transmit and receive line interface for T1 or E1 applications in a low power, 28-pin device operating from a +5V supply. Provides Analog PCM Line Interface

ap08

Abstract: DS2143 DS2180A DS2181A DS2186 DS2187 DS2188 DS5000
Contextual Info: DS2186 DS2186 DALLAS SEMICONDUCTOR FEATURES Transmit Line Interface PIN ASSIGNMENT • Line interface for T1 1.544 MHz and CEPT (2.048 MHz) primary rate networks TAIS Q 1 ZCSEN Q 2 • On-chip transmit LBO (line build out) and line drivers eliminate external components

CXT8192

Abstract: dpm 128 CS61574-IP1 600B 600C CS61574 CS61577 LEN210 TI-102 cs61574-il
Contextual Info: wm CS61574 JM Semiconductor Corporation T1/E1 Line Interface Features General Description • Provides Analog Transmission Line Interface for T1 and E1 Applications The CS61574 combines the complete analog transmit and receive line interface for T1 or E1 applications in a

quartz delay line

Abstract: CXT8192 600B 600C CS6158A CS6158A-IL1 CS6158A-IP1 S553-0013-06 Design -5V dc power supply using center-tapped transformer cs615b
Contextual Info: CS6158A A Cirrus Logic Company T1/E1 Line Interface Features General Description The CS6158A combines the complete analog transmit and receive line interface for T1 or E1 applications in a low power, 28-pin device operating from a +5V supply. The receiver uses a digital Delay-Locked-Loop which is

CON12

Abstract: kx-7 26 SO-64 CS61582 CS61582-IQ5 CS61584 12.352 cts
Contextual Info: CS61582 A Cirrus Logic Company D ual T1/E1 Line Interface Features General Description • The CS61582 is a dual line interface optimized for highly-integrated T1/E1 asynchronous or synchronous multiplexer applications such as SONET and SDH. Each channel features individual control and status

12v 600W AUDIO AMPLIFIER CIRCUIT DIAGRAM

Abstract: 600w class d circuit diagram schematics purepath class G
Contextual Info: TAS5630 www.ti.com. SLES220A – JUNE 2009 – REVISED SEPTEMBER 2009 300W STEREO / 600W MONO PurePath HD ANALOG-INPUT POWER STAGE

wireless subwoofer circuit diagram

Contextual Info: TAS5612 www.ti.com SLAS682 – NOVEMBER 2009 125W STEREO / 250W MONO PurePath HD DIGITAL-INPUT POWER STAGE Check for Samples: TAS5612 FEATURES APPLICATIONS • PurePath™ HD Enabled Integrated Feedback Provides: – Signal Bandwidth up to 80kHz for High

300w subwoofer amplifier PCB layout

Contextual Info: TAS5614 www.ti.com SLAS680 – DECEMBER 2009 150W STEREO / 300W MONO PurePath HD DIGITAL-INPUT POWER STAGE Check for Samples: TAS5614 FEATURES APPLICATIONS • • • • • • 23 • • • • • • • • PurePath™ HD Enabled Integrated Feedback

TAs56

Abstract: 2502W TAS5631
Contextual Info: TAS5612 www.ti.com SLAS682 – NOVEMBER 2009 125W STEREO / 250W MONO PurePath HD DIGITAL-INPUT POWER STAGE Check for Samples: TAS5612 FEATURES APPLICATIONS • PurePath™ HD Enabled Integrated Feedback Provides: – Signal Bandwidth up to 80kHz for High

600w class d circuit diagram schematics

Contextual Info: TAS5630 www.ti.com. SLES220A – JUNE 2009 – REVISED SEPTEMBER 2009 300W STEREO / 600W MONO PurePath HD ANALOG-INPUT POWER STAGE

IR DATABOOK SCR

Abstract: cmos logic databook BTS 8800 COMCLOK 13.56 CON12 line output transformer for television Transformer te-e TTL databook TTL databook application CS61584A
Contextual Info: CS61584A Product Databook =CIRRUS LOGIC FEATURES • Dual T1/E1 Line Interface ■ 3.3 Volt and 5 Volt Versions D ual T1/E1 Line In terface ■ Crystalless Jitter Attenuator Meets European CTR 12 and ETSI ETS 300 011 Specifications ■ Matched Impedance Transmit Drivers

LEN01

Abstract: LXT332 LXT332PE LXT332QE E1 AMI HDB3 decoder
Contextual Info: DATA SHEET AUGUST 1998 Revision 2.0 LXT332 Dual T1/E1 Line Interface Unit with Crystal-less Jitter Attenuation General Description Features The LXT332 is a fully integrated Dual Line Interface Unit DLIU for both 1.544 Mbps (T1) and 2.048 Mbps (E1) applications. It features B8ZS/HDB3 encoders and

LXT300NE

Abstract: LXT300 LXT300PE LXT301 LXT301NE sheft Register
Contextual Info: APRIL, 1996 LXT300 / LXT301 Integrated T1/E1 Short-Haul Transceivers General Description Features. The LXT300 and LXT301 are fully integrated transceivers for both North American 1.544 Mbps T l and International 2.048 Mbps (E l) applications. Transmit pulse shapes

LXT305A

Contextual Info: '$7$ 6+ 7 $35,/ ìääç 5HYLVLRQ íïí /;7êíè$ ,QWHJUDWHG 7ìî(ì 6KRUWð+DXO 7UDQVFHLYHU ZLWK 7UDQVPLW -$ *HQHUDO 'HVFULSWLRQ ì HDWXUHV 7KH /;7êíè$ LV D IXOO\ LQWHJUDWHG WUDQVFHLYHU IRU ERWK 1RUWK $PHULFDQ ìïèéé 0ESV õ7ìô DQG ,QWHUQDWLRQDO ëïíéå

equalizer circuit diagram

Abstract: MH89760B MH89761 TFS2573 ANSI T1.102 1987
Contextual Info: MH89761  T1 Transmit Equalizer Advance Information Features ISSUE 4 • Compatible with the MH89760B • Transmit equalizer and 6dB loop around circuit • 6dB pad for easier loopback testing • Programmable for varying degrees of equalization Pin Connections

T-1408

Abstract: LXT310 LXT317 LXT318 LXT360 LXT361 6 PORT LIU LXT318 Long-Haul E1 Transceiver TQFP 120 intel DECT transceiver
Contextual Info: Long Haul Products Frequently Asked Questions January 2001 Order Number: 249184-001 As of January 15, 2001, this document replaces the Level One document known as T1/E1 LIU — Longhaul. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

Contextual Info: DS2190-003 DS2190-003 DALLAS SEM ICONDUCTOR T1 NETWORK INTERFACE UNIT NIU PIN CONNECTIONS FEATURES • Modularized network interface for 1.544 Mbps T1 services • Network side connects directly to T1 line • Compatible with DS2180A Transceiver • Small size-approximately six square inchespermits integration onto line cards

Contextual Info: DALLAS s e m ic o n d u c to r FEATURES • Line interface forT1 1.544 MHz and CEPT (2.048 MHz) primary rate networks • O n-chip transmit LBO (line build out) and line drivers eliminate external components • Programmable output pulse shape supports shortand long-loop applications

Contextual Info: XR-T5684 January 1995-2 Low Power T1 Analog Interface GENERAL DESCRIPTION PIN ASSIGNMENT T h e X R -T 5 6 8 4 is a fu lly in te g ra te d PCM lin e transceiver intended for DSX-1 digital cross-connect applications. It combines both transmit and receive circuitry in a 28 pin PLCC or PDIP package. The

Contextual Info: CS61535A Semiconductor Corporation PCM Line Interface Features General Description • Provides Analog PCM Line Interface for T1 and PCM-30 Applications The CS61535 and CS61535A combine the analog transmit and receive line interface functions for a T1/PCM-30 interface in a single 28-pin device. The line

SR52 W 18

Abstract: GR-253-CORE GR-499-CORE PR11 T7690 T7698 uig823
Contextual Info: a e re 8 AdLib OCR Evaluation systems Data Sheet September 2002 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features . Integrated quad T1/E1 line interface and octal T1/ El receive frame monitor with HDLC processor provides system QoS capabilities .