A 2712 Search Results

MBM27128-25

Abstract: 27128-25 MBM27128 MBM27128-30 27128-20 INTEL 27128 MBM27128-20 Fujitsu 511
Contextual Info: FUJITSU MOS Memories MBM27128-20, MBM27128-25, MBM27128-30 UV Erasable 131,072-Bit Read Only Memory Description T h e F u jits u M BM 27128 is a hig h speed 131,072-bit s ta tic N-channei M O S e ra s a b le a nd e le c tric a lly re p ro g ra m m a b le re a d o n ly

TC2012M

Abstract: ARK120 AP23Y P23-F 2636i
Contextual Info: Kíngbríght SURFACE MOUNT LED LAMPS A P TC 2012 A P T2012 A P E 2712 A P23-F •* Part No. Material ?" nm Iv (mcd) @20mA Lens Type Min. Viewing Angle Typ. Dimension 201/2 2.0m m x 1,25mm x 0.75m m (0805 S uper Thin) A P T2012E C G aAsP/G aP 625 w ater clear

EPROM 27128

Abstract: Denpa HD614P0160S HD614P080S HN27256 HN27C256 HN27C256H HN27128A EPROM 27256 HN27128
Contextual Info: HD614P080S/ HD614P0160S Description The HD614P080S is a 4-bit single-chip microcom­ puter which can mount a standard EPROM 27128 for program memory. The HD614P0160S can m ount a standard EPROM 27256. The HD614P080S and HD614P0160S are pincompatible with mask ROM HMCS402/404/408,

2N3855

Abstract: 2N3856 2N3854 2N3856A 2N3855A 2N3854A n3860 2N2711 2N2712 2N2714
Contextual Info: SILICON SIGNAL TRANSISTORS GENERAL PURPOSE AMPLIFIERS TO-98 PA C K A G E Device Type b v CEO @ 10m A V V C E (S A T ) hFE M in .-M a x . @ I c , V c e (V) 2N 2711 2N 2712 2N 2713 2N 2714 2N 2923 NPN NPN NPN NPN NPN 18“ 18 18 18 25 2N 2924 2N 2925 2N 2926

27c644

Abstract: HN27256
Contextual Info: HD614P080S/ HD614P0160S Description The HD614P080S is a 4-bit single-chip microcom­ puter which can mount a standard EPROM 27128 for program memory. The HD614P0160S can m ount a standard EPROM 27256. The HD614P080S and HD614P0160S are pincompatible with mask RO M HMCS402/404/408,

Contextual Info: 2 .5 4 m m 0.1 ” E le v a te d F e m a le H e a d e r (Double R o w ) 2712 Series APPLICATION AND FEATURES SPECIFICATIONS 1. D iffe re n t fo o t le ngth fo r c u s to m e r design choice. 2. A vailable with squ are tail. 3. Mate with pin Header stick.

ULN3845A

Abstract: uln3846 3845A Z12K ULN3846A
Contextual Info: 27126 AM NOISE BLANKERS ULN 3845A CONNECTION RF GATE LOW A U D IO B LA N K T IM E R A U D IO BLANK T IM E (C ) A U D IO OUT, AU D IO O U T2 A U D IO IN Dwg. No. PS-003 T hese noise blanker integrated circuits contain all of the necessary circu itry for adding an extrem ely e fficient noise blanking technique

Contextual Info: Data Sheet True RMS AC + DC Tool Kit DMM Model 2712 T RUE RMS A ut o/ Manual Ranging Select between Auto or Manual ranging The 2712 is a full featured auto ranging true RMS DMM that combines performance, value and functionality. The 40000 count LCD has a green back

NEDA 1604 6F22 006P

Abstract: TL35A 4 digit volt meter NEDA 1604 operating manual for NEDA 1604 6F22 NEDA 1604 battery 6f22
Contextual Info: Data sheet True RMS AC + DC Tool Kit DMM Resolution Accuracy Model 2712 T RUE RMS A ut o/ Manual Ranging Select between Auto or Manual ranging The 2712 is a full featured auto ranging true RMS DMM that combines performance, value and functionality. The 40000 count LCD has a green back

2N3643

Abstract: 2N3844 transistor 2N3 2N2711 2N2712 2N2713 2N2714 2N2923 2N2924 2N2925
Contextual Info: SILICON SIGNAL TRANSISTORS GENERAL PURPOSE AMPLIFIERS TO-98 PACKAGE b v CEO Device Type @ 10m A V V CE (S A T ) hFE M in .-M a x . @ I c , V c e (V) 2N 2711 2N 2712 2N 2713 2N 2714 2N 2923 NPN NPN NPN NPN NPN 18“ 18 18 18 25 2N 2924 2N 2925 2N 2926 2N 3390

HMCS4* hd4074008

Abstract: pin diagram of IC 4013 n Denpa 4013 divider CD 4013 DIP EPROM 27256 rom 512x4 tl 4013 EPROM 27128 HD614P080S
Contextual Info: H D 6 1 4 P 0 8 0 S / H D 6 1 4 P 0 1 6 0 S Description The HD614P080S is a 4-bit single-chip microcom­ puter which can mount a standard EPROM 27128 for program memory. The HD614P0160S can m ount a standard EPROM 27256. The HD614P080S and HD614P0160S are pincompatible with mask ROM HMCS402/404/408,

2n3901 equivalent

Abstract: 2N2711 2N2712 2N2713 2N2714 2N2923 2N2924 2N2925 2N2926 2N3390
Contextual Info: SILICON SIGNAL TRANSISTORS GENERAL PURPOSE AMPLIFIERS TO-98 PACKAGE b v CEO Device Type @ 10m A V V C E (S A T ) hFE M in .-M a x . @ I c , V c e (V) 2N 2711 2N 2712 2N 2713 2N 2714 2N 2923 NPN NPN NPN NPN NPN 18“ 18 18 18 25 2N 2924 2N 2925 2N 2926 2N 3390

C 834

Abstract: c834
Contextual Info: TO SH IB A TMP47P834 CMOS 4-Bit Microcontroller TMP47P834N TMP47P834F Th e TM P47P834 is the O TP m icroco ntro ller w ith 64 Kbits PROM . For p rogram o p e ra tio n , the p ro g ra m m in g is achieved by using w ith EPROM p ro gra m m er TM M 27128A type and a d a p to r socket.

92112 ic

Abstract: 523AF IC 92112 RXME ABB ac dC converter circuit diagram 000-TR RTXP18 RTXP 18 ASEA RXEEC ABB ASEA rtxp18
Contextual Info: Ah II II f*IP IP ASEA B R O W N BOVERI ABB Relays _ -t Type RAEUB Neutral point voltage relay for systems with current converter m _ •■ ■ B03-2712E a % 1SLjm»y>8S5 D a ta s u b je c t to c h a n g e w ith o u t no tici O o Abstract Application J ; • Provides ground-fault protection on sys­

Contextual Info: H D 6 1 4 P 1 8 0 Description The HD614PI80 is a 4-bit single chip microcomputer which has mounted a standard EPRO M 2764/27128 for program memory. Hie HD614P180 is pin-compatible with the mask ROM type HMCS412C, but has some differences with it as shown in Table

HN27128AG-25

Contextual Info: H N 27128A G S e r ie s 16384-word X 8-bit UV Erasable and Programmable ROM The HN27128AG is a 16384-word by 8-bit erasable and electrically programmable ROM. This device is packaged in a 28-pin, dual-in-line package with transparent window. The transparent window allows

A3848

Contextual Info: 27121.15 DUAL-CONVERSION AM RECEIVER Providing the AM signal processing functions for an electronically tuned AM receiver ETR , the A3848EEQ includes two balanced mixers, a crystal local oscillator, an L/C-tuned local oscillator, oscillator buffer, IF amplifier, AM detector, scan control detectors, and a switchable voltage regulator. This dual-conversion device typically mixes the

HN27128AG-25

Abstract: HN27128AG-20 16384W
Contextual Info: H N 27128A G S e rie s — 16384-word X 8-bit U V Erasable and Programmable ROM The HN27128AG is a 16384-word by 8-bit erasable and electrically programmable ROM. This device is packaged in a 28-pin, dual-in-line package w ith transparent window. The transparent window allows

ah rzj

Abstract: 1N914 M27128A
Contextual Info: 7 7 SCS-THOMSON k7 A M 27128A r a © iL i© T O @ K ! l[ ] g § NMOS 128K (16K x 8 UV EPROM • FAST ACCESS TIME: 200ns ■ EXTENDED TEMPERATURE RANGE ■ SINGLE 5 V SUPPLY VOLTAGE ■ LOW STANDBY CURRENT: 40mA max ■ TTL COMPATIBLE DURING READ and

E78996

Abstract: IRFK6J054 27128 hex-pak IRFK6H054
Contextual Info: E.27128 international lairalRectifier Iso la te d • • • • B ase IRFK6H/J054 PROVISIONAL Pow er H E X - p a k A s s e m b ly - P aralle l C h ip V o ss = 60V High Current Capability. U L recognized E78996. Electrically Isolated Base Plate. Easy Assembly into Equipment.

78F0134

Abstract: DAP11 smd 78F0134M2 78F0138 NEC PD78F0138 PD780131 PD780132 PD780133 PD780134 PD780136
Contextual Info: User’s Manual 78K0/KE1 8-Bit Single-Chip Microcontrollers µPD780131 µPD780132 µPD780133 µPD780134 µPD780136 µPD780138 µPD78F0134 µPD78F0138 µPD780131 A µPD780132(A) µPD780133(A) µPD780134(A) µPD780136(A) µPD780138(A) µPD78F0134(A) µPD78F0138(A)

Contextual Info: User’s Manual 78K0/KE1 8-Bit Single-Chip Microcontrollers µPD780131 µPD780132 µPD780133 µPD780134 µPD780136 µPD780138 µPD78F0134 µPD78F0138 µPD780131 A µPD780132(A) µPD780133(A) µPD780134(A) µPD780136(A) µPD780138(A) µPD78F0134(A) µPD78F0138(A)

fujitsu uv erasable eprom

Abstract: Fujitsu Transistor Array
Contextual Info: A MOS M em ories • F U JIT S U M B M 2712 8 -2 5 , M B M 2 71 2 8 -3 0 UV Erasable 131,072-Bit Read Only Memory Description The Fujitsu MBM27128 is a high speed 131,072-bit static N-channel MOS erasable and electrically reprogrammable read only memory EPROM . It is especially well suited for applications

2322712

Contextual Info: Issued March 1997 232-2712 Data Pack C The decibel Data Sheet The bel was named in honour of Alexander Graham Bell. It is defined as the common logarithm of the ratio of two power levels P1 and P2. Hence the number of bells B is: B = Log P2 P1 A positive value of B represents power gain, a negative