XRT73L00 Search Results

CR14

Abstract: XRT71D00 XRT73L00 XRT73L02 Jaro Components
Contextual Info: TAN-042 Designing the XRT71D00 and the XRT73L00 Devices to operate in the Host Mode, and to be accessed via a single Chip Select pin. Preliminary July 19, 2001 Revision 1.03 DESIGNING THE XRT71D00 AND THE XRT73L00 DEVICES TO OPERATE IN THE HOST MODE, AND TO

Zener Diode 7v 400mW

Abstract: 1812GC102KAT2A zener diode 3.3V 400MW DMO11 1812GC102KA11A 1N5914 XRT73L00 36V zener Power line filter inductor Jaro Components
Contextual Info: TAN-043 Application Note - XRT73L00 DS3/E3/STS-1 LIU IC Power Conditioning Requirements October 24, 2001 Revision 1.06 XRT73L00 DS3/E3/STS-1 LIU Power Conditioning Requirements 1.0 OVERVIEW XRT73L00 is a combination DS3/E3/STS-1 Transceiver Line Interface Unit that is

CR14

Abstract: XRT71D00 XRT73L00 XRT73L02
Contextual Info: TAN-042 Designing the XRT71D00 and the XRT73L00 Devices to operate in the Host Mode, and to be accessed via a single Chip Select pin. Preliminary September 1, 2001 Revision 1.04 DESIGNING THE XRT71D00 AND THE XRT73L00 DEVICES TO OPERATE IN THE HOST MODE, AND TO

0X00

Abstract: GR-253-CORE GR-499-CORE XRT73L00 XRT73L00IV
Contextual Info: áç XRT73L00 E3/DS3/STS-1 LINE INTERFACE UNIT JULY 2001 REV. 1.2.0 FEATURES • Meets E3/DS3/STS-1 Jitter Tolerance Requirements GENERAL DESCRIPTION The XRT73L00 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS-1 applications and consists of a line transmitter and receiver integrated on a single chip.

CR14

Abstract: XRT71D00 XRT73L00 XRT73L02 GRM43 X7R Jaro
Contextual Info: TAN-042 Designing the XRT71D00 and the XRT73L00 Devices to operate in the Host Mode, and to be accessed via a single Chip Select pin. Preliminary October 19, 2001 Revision 1.05 DESIGNING THE XRT71D00 AND THE XRT73L00 DEVICES TO OPERATE IN THE HOST MODE, AND TO

XRT73L00A

Contextual Info: XRT73LC00A E3/DS3/STS-1 LINE INTERFACE UNIT AUGUST 2008 REV. 1.0.1 GENERAL DESCRIPTION FEATURES The XRT73LC00A DS3/E3/STS-1 Line Interface Unit is a low power CMOS version of the XRT73L00A and consists of a line transmitter and receiver integrated on a single chip and is designed for DS3, E3 or

0X00

Abstract: GR-253-CORE GR-499-CORE XRT73L00 XRT73L00A XRT73L00AIV
Contextual Info: áç XRT73L00A E3/DS3/STS-1 LINE INTERFACE UNIT SEPTEMBER 2001 REV. 1.3.0 FEATURES • Incorporates an improved Timing Recovery circuit and is pin and functional compatible to XRT73L00 GENERAL DESCRIPTION The XRT73L00A DS3/E3/STS-1 Line Interface Unit is an improved version of the XRT73L00 and consists of

T73LC00

Abstract: 0X00 GR-253-CORE GR-499-CORE XRT73L00A XRT73LC00 XRT73LC00IV M3015
Contextual Info: áç XRT73LC00 PRELIMINARY E3/DS3/STS-1 LINE INTERFACE UNIT AUGUST 2002 REV. P1.0.1 FEATURES • Incorporates an improved Timing Recovery circuit and is pin and functional compatible to XRT73L00A GENERAL DESCRIPTION The XRT73LC00 DS3/E3/STS-1 Line Interface Unit is

CR14

Abstract: XRT71D00 XRT73L00 XRT73L02
Contextual Info: TAN-042 Designing the XRT71D00 and the XRT73L00 Devices to operate in the Host Mode, and to be accessed via a single Chip Select pin. Preliminary June 7, 2001 Revision 1.02 DESIGNING THE XRT71D00 AND THE XRT73L00 DEVICES TO OPERATE IN THE HOST MODE, AND TO

XRT73L02

Abstract: CR14 XRT71D00 XRT73L00 Jaro Components
Contextual Info: TAN-042 Designing the XRT71D00 and the XRT73L00 Devices to operate in the Host Mode, and to be accessed via a single Chip Select pin. Preliminary May 23, 2001 Revision 1.01 DESIGNING THE XRT71D00 AND THE XRT73L00 DEVICES TO OPERATE IN THE HOST MODE, AND TO

GR-253-CORE

Abstract: GR-499-CORE XRT73L00A XRT73LC00A XRT73LC00AIV 0X00
Contextual Info: xr XRT73LC00A PRELIMINARY E3/DS3/STS-1 LINE INTERFACE UNIT AUGUST 2004 REV. P1.0.0 GENERAL DESCRIPTION FEATURES • Incorporates an improved Timing Recovery circuit and is pin and functional compatible to XRT73L00A The XRT73LC00A DS3/E3/STS-1 Line Interface Unit

0X00

Abstract: GR-253-CORE GR-499-CORE XRT73L00A XRT73LC00A XRT73LC00AIV
Contextual Info: XRT73LC00A E3/DS3/STS-1 LINE INTERFACE UNIT MAY 2011 REV. 1.0.2 GENERAL DESCRIPTION FEATURES The XRT73LC00A DS3/E3/STS-1 Line Interface Unit is a low power CMOS version of the XRT73L00A and consists of a line transmitter and receiver integrated on a single chip and is designed for DS3, E3 or

ict TRANSFORMER

Contextual Info: áç XRT73L00 PRELIMINARY E3/DS3/STS-1 LINE INTERFACE UNIT SEPTEMBER 2000 REV. P1.0.3 FEATURES • Meets E3/DS3/STS-1 Jitter Tolerance Requirements GENERAL DESCRIPTION The XRT73L00 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS-1 applications and consists of a line transmitter and receiver integrated on a single chip.

XRT73L00A

Abstract: 0X00 GR-253-CORE GR-499-CORE XRT73L00 XRT73L00AIV
Contextual Info: áç XRT73L00A E3/DS3/STS-1 LINE INTERFACE UNIT AUGUST 2002 REV. 2.0.1 FEATURES • Incorporates an improved Timing Recovery circuit and is pin and functional compatible to XRT73L00 GENERAL DESCRIPTION The XRT73L00A DS3/E3/STS-1 Line Interface Unit is an improved version of the XRT73L00 and consists of

Contextual Info: DATA SHEET AP NOTE TAN-042 Communications XRT73L00A DS3/E3/STS-1 Line Interface Unit AP NOTE TAN-043 Features • Meets E3/DS3/STS-1 Jitter Tolerance Requirements • Full Loop-Back Capability • Transmit and Receive Power Down Modes • Full Redundancy Support

0X00

Abstract: GR-253-CORE GR-499-CORE XRT73L00 XRT73L00IV 110ORDERING
Contextual Info: áç XRT73L00 E3/DS3/STS-1 LINE INTERFACE UNIT APRIL 2001 REV. 1.1.0 FEATURES • Meets E3/DS3/STS-1 Jitter Tolerance Requirements GENERAL DESCRIPTION The XRT73L00 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS-1 applications and consists of a line transmitter and receiver integrated on a single chip.

225feet

Contextual Info:  XRT73L00 PRELIMINARY E3/DS3/STS-1 LINE INTERFACE UNIT NOVEMBER 2000 REV. P1.0.5 GENERAL DESCRIPTION FEATURES • Meets E3/DS3/STS-1 Jitter Tolerance Requirements The XRT73L00 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS-1 applications and consists of a line transmitter and receiver integrated on a single chip.

Zener Diode 7v 400mW

Abstract: 3.6v zener diode S1210-682K Zener Diode 3v 400mW 1812GC102KAT2A DMO11 202S43W102KV4E CC1812 Zener Diode 7 10v 400mW 1812GC102KA11A
Contextual Info: TAN-043 Application Note - XRT73L00 DS3/E3/STS-1 LIU IC Power Conditioning Requirements May 23, 2001 Revision 1.05 XRT73L00 DS3/E3/STS-1 LIU Power Conditioning Requirements 1.0 OVERVIEW XRT73L00 is a combination DS3/E3/STS-1 Transceiver Line Interface Unit that is

0X00

Abstract: GR-253-CORE GR-499-CORE XRT73L00 XRT73L00IV
Contextual Info: áç XRT73L00 PRELIMINARY E3/DS3/STS-1 LINE INTERFACE UNIT AUGUST 2000 REV. P1.0.2 GENERAL DESCRIPTION The XRT73L00 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS-1 applications and consists of a line transmitter and receiver integrated on a single chip.

HDB3 AMI ENCODER DECODER

Abstract: 0X00 GR-253-CORE GR-499-CORE XRT73L00A XRT73LC00A XRT73LC00AIV
Contextual Info: XRT73LC00A E3/DS3/STS-1 LINE INTERFACE UNIT AUGUST 2008 REV. 1.0.1 GENERAL DESCRIPTION FEATURES The XRT73LC00A DS3/E3/STS-1 Line Interface Unit is a low power CMOS version of the XRT73L00A and consists of a line transmitter and receiver integrated on a single chip and is designed for DS3, E3 or

Contextual Info: DATA SHEET Communications DS3/E3 Transceiver XRT73L00 E3/DS3/STS-1 Line Interface Unit Features • Meets E3/DS3/STS-1 Jitter Tolerance Requirements • Full Loop-Back Capability • Transmit and Receive Power Down Modes • Full Redundancy Support • Contains a 4-Wire Microprocessor Serial Interface

r4363

Abstract: CP Clare RELAY dmo 465 IC 404
Contextual Info: áç XRT72L53 PRELIMINARY THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.6 GENERAL DESCRIPTION The XRT72L53, 3 Channel DS3/E3 Framer IC is designed to accept User Data from the Terminal Equipment and insert this data into the Payload bit-fields

B628

Abstract: datasheet relay NAIS 5v 5 pin iC 458 XRT72L58 "Encoder IC" NAIS 210 RELAY octal tri state buffer ic DS3-M13 XRT72L58IB TTB-11
Contextual Info: áç XRT72L58 PRELIMINARY EIGHT CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The XRT72L58 Octal DS3/E3 Framer is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bit-fields within an

18NL

Abstract: TX3036 PEB 22554 TX1301 t1180nl LXT6155 T1180 T6074 T1095NL t1213
Contextual Info: Telecommunications Products TELECOMMUNICATIONS PRODUCTS Pulse is a leading provider of magnetics for telecom infrastructure equipment, customer premises equipment, audio interface applications, and emerging applications such as VoIP. Our broad portfolio of transformers and integrated transformer modules