X16373 Search Results

Contextual Info: / = ? S G S -T H O M S O N 74LC X16373A L0W V0LTAGE 16. B|T D-TYPE LATCH 3-STATE WITH 5V TOLERANT INPUTS AND OUTPUT PRELIMINARY DATA . 5V TOLERANT INPUTS AND OUTPUTS . HIGH SPEED: tpD = 5.4 ns MAX. at Vcc = 3V . POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview Low -V oltage 1.8/2.5/3.3V 1 6 -Bit Transparent Latch M C 74VC X16373 W ith 3 .6V -T o leran t Inputs and O utputs 3 -S ta te , N on-Inverting The X16373 is an advanced performance, non-inverting

Contextual Info: S E M IC O N D U C T O R -n 74VC X16373 Low Voltage 16-Bit Transparent Latch w ith 3.6V Tolerant Inputs and O utputs General Description Features The X16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended tor bus oriented appli­

74LCX16373A

Abstract: 74LCX16373T LCX16373 TSSOP48
Contextual Info: SGS-THOMSON M e M iH ie T r is i « 74LC X16373A LOW VOLTAGE 16-BIT D-TYPE LATCH 3-STATE W ITH 5V TO LERANT INPUTS AND O U TPU T PRELIM IN ARY DATA . 5V TOLERANT INPUTS AND OUTPUTS . HIGH SPEED: tpD = 5.4 ns MAX. at Vcc = 3V . POWER-DOWN PROTECTION ON INPUTS

LM723 pin details

Abstract: LM723 application notes LM723 application note M38510-10104 lm723 54L73 DS26LV31 54L04 application lm723 945DM
Contextual Info: ENHANCED SOLUTIONS DESIGN/PROCESS CHANGE NOTIFICATION formerly Military & Aerospace Division PCN Nr: 2002 Listing GIDEP Nr: GIDEP Category: Issued: 01/09/2002 TRB Nr: Product ID (Description): Proposed Date of Change: Description of Change: Effect of Change:

2D135

Contextual Info: I Highspeed CMOS 3.3V 16-Bit Transparent Latch Q u a l it y X16373 S e m ic o n d u c t o r , I n c . FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Industry standard pinouts • 10 fiA lCCQ quiescent power supply current • Hot insertable

lcx16373

Contextual Info: Febru a ry 1994 Revised March 1999 SEMICONDUCTOR TM General Description Features T h e X16373 contains sixteen non-inverting latches with 3-STATE o utputs and is intended fo r bus oriented applica­ tions. The device is byte controlled. The flip-flops appear

Contextual Info: A I R C H I L D pebm 7 J 9 Revised Aprii 1999 S E M ¡ C O N D U C T O R TM General Description Features T h e L C X 1 6 3 7 3 c o n ta in s s ix te e n n o n -in v e rtin g la tc h e s w ith • 5 V to le ra n t in p u ts a n d o u tp u ts 3 -S T A T E o u tp u ts a n d is in te n d e d fo r b u s o rie n te d a p p lic a ­

lcx16373

Abstract: 74LCX16373 74LCX16373MEA 74LCX16373MTD MS48A MTD48
Contextual Info: pebm7 j 9!41QQQ Revised April 1999 X16373 Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs General Description Features T h e X16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applica­

Contextual Info: F ë h m a /y 1994 Revised April 1999 SEMICONDUCTOR TM X16373 Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs General Description Features T h e X16373 contains sixteen non-inverting latches with 3-STATE o utputs and is intended fo r bus oriented applica­

lcx74

Abstract: 74LCX 241FF lcx16373A
Contextual Info: 1-1 TC74LCX / LVQ / LVX Product Guide TC 74LCX Series TC 74LCX Type No. 00 F/ F N / F S 02 F/ FN /F S 04 F/ FN /F S 08 F/ F N / F S 32 F / F N / F S TC 74LCX TC 74LCX TC74LCX TC74LCX Function N A N D G ATE N O R GATE A N D GATE O R GATE Pin 14 Page 103 14