TS68360 Search Results

TS68360

Abstract: 241Pin xtal 32.768
Contextual Info: TS68EN360 32:BIT QUAD INTEGRATED COMMUNICATION CONTROLLER DESCRIPTION The TS68360 QUad Integrated Communication Controller QUICCt is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in communications activities.

Contextual Info: Features • CPU32+ Processor 4.5 MIPS at 25 MHz • • • • • • • • • • • • • • • – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode – Byte-misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

TS68360

Abstract: Thomson-csf motorola
Contextual Info: TSPC860 32 BIT QUAD INTEGRATED POWER QUICC COMMUNICATION CONTROLLER DESCRIPTION The TSPC860 PowerPC™ QUad Integrated Communication Controller Power QUICC™ is a versatile one-chip integrated microprocessor and peripheral combination that can be used

TS68EN360VR25

Abstract: SMD MARKING CODE WE3 TS68EN360VA25 MC68302 TS68040 TS68302 TS68EN360 THOMSON-CSF PRODUCTS TSPC603
Contextual Info: TS68EN360 32:BIT QUAD INTEGRATED COMMUNICATION CONTROLLER DESCRIPTION The TS68EN360 QUad Integrated Communication Controller QUICCt is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in communications activities.

smd diode S4 58a

Abstract: PLL VCO MIL-PRF-38535 8a 2113A TS68EN360VA33L MC68302 PA15 TS68040 TS68302 TS68EN360 smd marking 58a
Contextual Info: Features • CPU32+ Processor 4.5 MIPS at 25 MHz • • • • • • • • • • • • • • • – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode – Byte-misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

SIM60

Abstract: 8a 2113A atmel 748 MC68302 PA15 TS68040 TS68302 TS68EN360 smd marking 58a S43 SMD
Contextual Info: Features • CPU32+ Processor 4.5 MIPS at 25 MHz • • • • • • • • • • • • • • • – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode – Byte-misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

12AS1

Abstract: TS68020 5962-9760702 8a 2113A 5962-SMD-97607
Contextual Info: Features • CPU32+ Processor 4.5 MIPS at 25 MHz • • • • • • • • • • • • • • • – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode – Byte-Misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

TS68EN360

Abstract: microprocessor SMD MARKING CODE s4 58A space qualified synthesizer mil-prf-38535 S43 SMD 5962-9760701MXC 5962-9760702 5962-SMD-97607
Contextual Info: TS68EN360 32-bit Quad Integrated Communication Controller Datasheet Features • CPU32+ Processor 4.5 MIPS at 25 MHz • • • • • • • • • • • • • • • – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode