TI010 Search Results

2a117

Contextual Info: 54AC11158, 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS TI010&— D 2957 JULY 1969— REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11158 . . . J PACKAGE 74AC11158 . . . DW OR N PACKAGE TOP VIEW Center-Pin V c c and GND Configurations to

54AC11112

Abstract: 74AC11112
Contextual Info: 54AC11112, 74AC11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0101— D3334, JU N E 1989— REVISED M AR CH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11112 . . . J PACKAGE 74AC11112 . . . D OH N PACKAGE TOP VIEW

181-D

Abstract: 54AC11175 74AC11175 109-D3388
Contextual Info: 54AC11175, 74AC11175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR TI0109— D3388, DECEMBER 1989— REVISED M ARCH 1990 Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators 5 4 A C 1 1175 . . . J P ACKA G E 74A C 11 1 75 . . . D W O R N P ACKA G E

D3256

Abstract: 74ACT11257 ti0100 54ACT11257
Contextual Info: 54ACT11257, 74ACT11257 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/ MULTIPLEXERS WITH 3-STATE OUTPUTS TI0100— D3256, JA N U AR Y 1989— REVISED M ARCH 1990 54A C T11257 I PACKAGE 74ACT11257 . . . DW OR N PACKAGE • Inputs are TTL-Voltage Compatible 3-State Outputs Interface Directly with

T10103

Abstract: 74ACT11112
Contextual Info: 54ACT11112, 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0103—D3339, JUNE 1989— REVISED JANUARY 1990 • Inputs are TTL-Voltage Compatible 54 A C T 1 1 1 1 2 . . . J P ACKA G E 7 4 A C T 1 1112 . . . D O R N P ACKA G E

74AC11157

Abstract: D2957 54AC11157
Contextual Info: 54AC11157, 74AC11157 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS TI0107— D2957, JU LY 1989— REVISED MARCH 1990 • Buffered Inputs and Outputs S4AC11157 . . . J PACKAGE 74AC11157 . . . DW OR N PACKAGE Flow-Through Architecture to Optimize PCB

B1A16

Contextual Info: S4AC11157, 74AC11157 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS TI0107—D2957, JULY 1989— REVISED MARCH 1990 54AC11157 . . . J PACKAGE 74AC11157 DW OR N PACKAGE • Buffered Inputs and Outputs Flow-Through Architecture to Optimize PCB Layout

C11138

Abstract: d3102
Contextual Info: 54AC11138, 74AC11138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS TI0102— D3102, M AY 1986— REVISED JAN U AR Y 1990 Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems 54AC11138 . . . J PACKAGE 74AC11138 . . . D OR N PACK AGE

74AC11151

Contextual Info: 54AC11151, 74AC11151 1 OF 8 DATA SELECTORS/MULTIPLEXERS TI0105— D3348, JUNE 1989— REVISED JANUARY 1990 • 8-Llne to 1-Llne Multiplexers can Perforin as: Boolean Function Generators, Parallelto-Serlal Converters, Data Source Selectors 54AC11151 . . . J PACKAGE

TI0106

Abstract: 54act11151 74ACT11151 TI0106-D3349
Contextual Info: 54ACT11151, 74ACT11151 1 OF 8 DATA SELECTORS/MULTIPLEXERS TI0106— D3349, JULY 1969— REVISED MARCH 1990 54ACT11151 . . . J PACKAGE 74ACT11151 . . . D O R N PACKAGE Inputs are TTL-Voltage Compatible 8-Line to 1-Line Multiplexers can Perform as: Boolean Function Generators, Parallelto-S erial Converters, Data Source Selectors

74AC11151

Abstract: 1 of 8 selector TI010 54AC11151 D3348
Contextual Info: 54AC11151, 74AC11151 1 OF 8 DATA SELECTORS/MULTIPLEXERS TI0105— D3348, JUNE 1989— REVISED JANUARY 1990 5 4A C 11 1 51 . . . J P A C K A G E 7 4 A C 1 1151 . . . D O R N P A C K A G E • 8-Line to 1-Line Multiplexers can Perform as: Boolean Function Generators, Parallelto-Serial Converters, Data Source Selectors

54ACT11138

Abstract: 74AC11138 74ACT11138 TI0104-D3266
Contextual Info: 54ACT11138, 74ACT11138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS TI0104— D 3266, JANUARY 1989— REVISED JANUARY 1990 • Inputs are TTL-Voltage Compatible 54 A C T 1 1 1 3 8 . . . J P A C K A G E 7 4 A C T 1 1138 . . . D O R N P A C K A G E Designed Specifically for High-Speed

LC-22-G-BLACK

Abstract: HCM49 16.000MABJ-UT UPD78F0730MC-CAB-AX UX60A-MB-5ST LC-22-G-RED BLM41PG750S p121 c8 uPD78F0730 HCM49 UPD78F0730MC
Contextual Info: 5 4 3 2 1 SW1 D VDD P120 P120 EVDD D 1 2 0.1uF P30 P01 P00 P120 RESET FLMD0 P122 P121 1 2 3 4 5 6 7 8 9 10 11 12 USBP 13 USBM 14 USBPUC 15 VDD 2 1 JP2 C3 0.47uF R1 1 R2 1 2 27ohm 2 27ohm C P30/INTP1 P01/TI010/TO00 P00/TI000 P120/INTP0 RESET FLMD0 P122/X2/EXCLK/OCD0B

Contextual Info: 54ACT11138, 74ACT11138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS TI0104—03266, JANUARY 1989— REVISED JANUARY 1990 • Inputs are TTL-Voltage Compatible 54AC T1113« . . . j p a c k a g e 74ACT11138 . . . D OR N PACKAGE • Designed Specifically for High-Speed

Contextual Info: User’s Manual V850ES/KF2 32-bit Single-Chip Microcontrollers Hardware PD70F3728 μPD70F3729 Document No. U17704EJ2V0UD00 2nd edition Date Published December 2006 N CP(K) 2005 Printed in Japan [MEMO] 2 User’s Manual U17704EJ2V0UD NOTES FOR CMOS DEVICES

Contextual Info: User’s Manual V850ES/KG2 32-bit Single-Chip Microcontrollers Hardware PD70F3731 μPD70F3732 Document No. U17703EJ2V0UD00 2nd edition Date Published October 2006 N CP(K) 2005 Printed in Japan [MEMO] 2 User’s Manual U17703EJ2V0UD NOTES FOR CMOS DEVICES

Contextual Info: User’s Manual 78K0/KC1 8-Bit Single-Chip Microcontrollers µPD780111 µPD780112 µPD780113 µPD780114 µPD78F0114 µPD780111 A µPD780112(A) µPD780113(A) µPD780114(A) µPD78F0114(A) Document No. U16227EJ3V0UD00 (3rd edition) Date Published February 2005 N CP(K)

Contextual Info: 54AC11175, 74AC11175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR T 10109— D3388, DECEMBER 1989— REVISED MARCH 1990 • Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators 5 4 A C 11 1 75 . . . J P A C K A G E 74A C 11175 . . . DW O R N PACKAGE

780078Y

Abstract: 780078GK BUZ 215 diagram KHN 10 uPD780076Y PD780078 uPD78F0078 uPD780034A PD780076 UPD780078YGC-AB8
Contextual Info: PRELIMINARY INFORMATION DATA PRODUCT SHEET MOS INTEGRATED CIRCUIT µPD780076, 780078, 780076Y, 780078Y 8-BIT SINGLE-CHIP MICROCONTROLLERS DESCRIPTION The µPD780076 and 780078 are products in the µPD780078 Subseries within the 78K/0 Series. They are based

SI-K2

Abstract: PD78031
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD78F0833Y 8-BIT SINGLE-CHIP MICROCONTROLLERS DESCRIPTION The µPD78F0833Y is a product of the µPD780833Y Subseries in the 78K/0 Series, and equivalent to the µPD780833Y with a flash memory in place of internal ROM. This device can be programmed write, delete, rewrite without being removed from the board.

G175

Abstract: 234T0 82439HX CH340
Contextual Info: INTEL 430HX PCISET 82439HX SYSTEM CONTROLLER TXC • ■ ■ ■ ■ Optional Error Checking and Correction (ECC) Supports All 3V Pentium Processors Dual Processor Support PCI 2.1 Compliant Integrated Second-Level Cache Controller — — — — — —

Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

SAn11

Abstract: uPD70F3732 nec nl 618 STPR10 tcm51 CA850 ID850QB uPD70F3731 V850ES UPD70F3732GC-8EA
Contextual Info: Preliminary User’s Manual V850ES/KG2 32-Bit Single-Chip Microcontrollers Hardware µPD70F3731 µPD70F3732 Document No. U17703EJ1V0UD00 1st edition Date Published November 2005 N CP(K) 2005 Printed in Japan [MEMO] 2 Preliminary User’s Manual U17703EJ1V0UD

Quanta MK1

Contextual Info: User’s Manual 78K0/FE2 8-Bit Single-Chip Microcontrollers PD78F0887 A μPD78F0888(A) μPD78F0889(A) μPD78F0890(A) μPD78F0887(A2) μPD78F0888(A2) μPD78F0889(A2) μPD78F0890(A2) The 78K0/FE2 has an on-chip debug function. Do not use this product for mass production after the on-chip debug function has been used because its reliability cannot