SI5355 Search Results

Si5355A

Abstract: AN360 JESD78 MO-220 Si5356
Contextual Info: Si5355 A N Y - F REQUENCY 1–200 MH Z Q UAD F REQUENCY 8-O UTPUT C LOCK G ENERATOR Features          Generates any frequency from 1 to  200 MHz on each of the 4 output banks Guaranteed 0 ppm frequency synthesis error for any combination of frequencies 

J-STD-020 MSL Rating

Abstract: si5355
Contextual Info: Si5355 A N Y - F REQUENCY 1–200 MH Z Q UAD F REQUENCY 8-O UTPUT C LOCK G ENERATOR Features          Generates any frequency from 1 to  200 MHz on each of the 4 output banks Eight CMOS clock outputs Guaranteed 0 ppm frequency synthesis 

AN360

Abstract: crystal 26 Mhz AB10-25MHZ-E20-T Si533x NX5032GA-25MHZ ECS-250-8-36CKM TSX-3225 EPSON 25Mhz datasheet crystal TSX-3225 CL1112
Contextual Info: AN360 C R YS TA L S ELECTION G UIDE FOR Si533 X A N D Si5355/56 D EVICES 1. Introduction This application note provides general guidelines for the selection and use of crystals with the Si533x and Si5355/56 family of any-frequency, any-output clock generators and zero-delay buffers. Many of these devices can

J-STD-020 MSL Rating

Abstract: pcb thermal Design guide trace theta layout via
Contextual Info: Si5355 A N Y - F REQUENCY 1–200 MH Z Q UAD F REQUENCY 8-O UTPUT C LOCK G ENERATOR Features          Generates any frequency from 1 to  200 MHz on each of the 4 output banks Eight CMOS clock outputs Guaranteed 0 ppm frequency synthesis 

Contextual Info: Si5355 A N Y - R A T E 1–200 MH Z Q U A D F R E QUE N C Y 8-O UTPUT C L O C K G ENERATOR Features         Generates any frequency from 1 to  200 MHz on each of the 4 output banks Guaranteed 0 ppm frequency synthesis error for any combination of frequencies 

capacitor rse 104

Abstract: Si5356B-A00322-GM SI5356B
Contextual Info: Si5356B * I 2C P ROGRAMMABLE , A NY - F R E Q U E N C Y 1 – 2 0 0 M H Z , Q UAD F R E Q U E N C Y 8-O UTPUT C LOCK G ENERATOR Features          Generates any frequency from 1 to  200 MHz on each of the 4 output banks Eight CMOS clock outputs

Contextual Info: Si5356A I 2C P ROGRAMMABLE , A NY - F R E Q U E N C Y 1 – 2 0 0 M H Z , Q UAD F R E Q U E N C Y 8-O UTPUT C LOCK G ENERATOR Features          Generates any frequency from 1 to  200 MHz on each of the 4 output banks Programmable frequency configuration 

Contextual Info: Si5338 I 2 C - P R O GRA MM A B LE A NY - F R E Q U E N C Y, A NY - O UTPUT Q UAD C LOCK G ENERATOR Features Applications CLK0B VDDO0 SDA 22 21 20 19 18 CLK1A IN2 2 17 CLK1B IN3 3 16 VDDO1 GND GND Pad IN4 4 15 VDDO2 IN5 5      Any-frequency clock conversion

Contextual Info: Si5356B * I 2C P ROGRAMMABLE , A NY - F R E Q U E N C Y 1 – 2 0 0 M H Z , Q UAD F R E Q U E N C Y 8-O UTPUT C LOCK G ENERATOR Features          Generates any frequency from 1 to  200 MHz on each of the 4 output banks Eight CMOS clock outputs

Contextual Info: AN408 TERMINATION O P T I O N S FOR A NY - F R E QUE N C Y, A N Y - O UTPUT C LOCK G ENERATORS A N D C LOCK B UFFERS 1. Introduction This application note provides termination recommendations for connecting input and output clock signals to the Si533x and Si5356/55 family of timing ICs and is not applicable to any other Silicon Labs devices.

Si32176

Abstract: si3217 Si32171 SIL F330 Si32178 Si3239 si2167 Si4735 SI3205 Si32177
Contextual Info: PRODUCT SELECTOR GUIDE T0 RAM ROM Expansion Control ALE /PSEN I/O ports P3 P2 P1 P0 T1 Timers Serial Port TxD FA L L 2 010 High-Performance, Analog-Intensive, Mixed-Signal ICs www.silabs.com RxD PRODUCT SELECTOR GUIDE Product Selector Tables GET FULL PRODUCT LISTINGS, DATA SHEETS, APP NOTES, SAMPLES AND MORE AT www.silabs.com

Contextual Info: Si5334 P I N - C ONTR OLLED A N Y - F REQUENCY, A NY - O UTPUT Q U A D C L O C K G ENERATOR Features  CMOS  crystal: 8 to 30 MHz input: 5 to 200 MHz SSTL/HSTL input: 5 to 350 MHz Differential input: 5 to 710 MHz  Independently-configurable outputs

Contextual Info: Si5356A I 2C P ROGRAMMABLE , A NY - F R E Q U E N C Y 1 – 2 0 0 M H Z , Q UAD F R E Q U E N C Y 8-O UTPUT C LOCK G ENERATOR Features          Generates any frequency from 1 to  200 MHz on each of the 4 output banks Programmable frequency configuration 

Contextual Info: CLOCK AND OSCILLATOR PRODUCT SELECTOR GUIDE SPRING 2013 SP RING 2 013 Clocks and oscillators for communications, computing and consumer applications www.silabs.com/timing Engineering for a mixed-signal world. 2 / C L O C K A N D O S C I L L AT O R S E L E C T O R

SI5356

Abstract: Si5356A
Contextual Info: Si5356A I 2C P ROGRAMMABLE , A NY - F R E Q U E N C Y 1 – 2 0 0 M H Z , Q UAD F R E Q U E N C Y 8-O UTPUT C LOCK G ENERATOR Features          Generates any frequency from 1 to  200 MHz on each of the 4 output banks Programmable frequency configuration 

Si5338

Abstract: Si5338s Si5338-EVB si5330 SI5338C-AXXXXXGM Si5338X-A-GM
Contextual Info: Si5338 I 2 C - P R O GRA MM A B LE A NY - F R E Q U E N C Y, A NY - O UTPUT Q UAD C LOCK G ENERATOR Features Applications CLK0B VDDO0 SDA 22 21 20 19 18 CLK1A IN2 2 17 CLK1B IN3 3 16 VDDO1 GND GND Pad IN4 4 15 VDDO2 IN5 5      Any-frequency clock conversion

Si5351

Abstract: Si5350 Si570 Si599 Synthesizers PLL for USB 4 pin MHz crystal CRYSTAL 20 mhZ DUAL XTAL OSCILLATOR IC Si5324 Si5356
Contextual Info: CLOCK AND OSCILLATOR PRODUCT SELECTOR GUIDE www.silabs.com Frequency Flexibility Engineered to support the widest frequency range for maximum design flexibility. Available in industry standard RoHS compliant packages. Ultra-Low Jitter Based on our patented DSPLL and MultiSynth technologies, these low jitter products improve

SI5356

Contextual Info: Si5356A I 2C P ROGRAMMABLE , A NY - F R E Q U E N C Y 1 – 2 0 0 M H Z , Q UAD F R E Q U E N C Y 8-O UTPUT C LOCK G ENERATOR Features          Generates any frequency from 1 to  200 MHz on each of the 4 output banks Programmable frequency configuration 

metal detector plans

Contextual Info: Si5334 P I N - C ONTR OLLED A N Y - F REQUENCY, A NY - O UTPUT Q U A D C L O C K G ENERATOR Features  CMOS  crystal: 8 to 30 MHz input: 5 to 200 MHz SSTL/HSTL input: 5 to 350 MHz Differential input: 5 to 710 MHz  Independently-configurable outputs

10Gbase-kr transmitter

Abstract: si570 Si5338 10GBASE-KR si5334 AN581 si5330 SI5350 GR253-CORE-003
Contextual Info: AN581 M EETING S ER D ES J I T T E R R EQUIREMENTS S IMPLIFIED W I T H S I L I C O N L ABS C LOCKS AND O SCILLATORS 1. Introduction This document provides guidelines for selecting Silicon Labs clocking devices that meet jitter requirements for high-speed transmitters used in communications and networking applications. The requirements can be met with

Si533x

Abstract: AN408 AN4087 50 Ohm Termination Texas independent termination "50 Ohm" si5330 data sheet si5338 Si5356 AN360 Si5334
Contextual Info: AN408 TERMINATION O P T I O N S FOR A NY - F R E QUE N C Y, A N Y - O UTPUT C LOCK G ENERATORS A N D C LOCK B UFFERS 1. Introduction This application note provides termination recommendations for connecting input and output clock signals to the Si533x and Si5356/55 family of timing ICs and is not applicable to any other Silicon Labs devices.

Si5338

Abstract: AN428 C8051F301 Silabs Si5356 AN136 F301 Si5326 Si5368 Si5338-EVB
Contextual Info: AN428 J UMP S TART : I N - S YSTEM , F LA SH - B ASED P ROGRAMMING FOR S ILIC ON L ABS ’ T I MI N G P RODUCTS 1. Introduction Silicon Labs' timing products provide unparalleled performance, flexibility, and functionality, freeing designers to focus on other value-adding aspects of their designs. To take full advantage of the flexibility of these timing devices

SI510

Contextual Info: Timing Selector Guide SPRING 2014 HIGH PERFORMANCE CUSTOMIZABLE FREQUENCY FLEXIBILITY 2-WEEK LEAD TIME 2 / C L O C K A N D O S C I L L AT O R S E L E C T O R Timing Solutions Comprehensive — complete portfolio of oscillators, clock generators, clock buffers and jitter attenuators

QFN-36 footprint

Abstract: Si5338 Si570 IPC-1752 si5330b Si5334 Si599 Si53x Si57x-EVB Si5338-EVB
Contextual Info: Clock and Oscillator PRODUCt SELECTOR GUIDE www.silabs.com Frequency Flexibility Engineered to support the widest frequency range for maximum design flexibility. Available in industry standard RoHS compliant packages. Ultra-Low Jitter Based on our patented DSPLL and MultiSynth technologies, these low jitter products improve