SN54LS11 Search Results

64LS11

Abstract: 74LS11M
Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3 INPUT POSITIVE AND GATES APRIL 1 9 8 5 - R E V I S E D M A R C H 1 9B 8 • • Package Options Include Plastic "Sm all O utline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs

Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

SN74LS11

Abstract: SN54LS11 SN74S11 SN54S11
Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

S113

Abstract: SN54LS113A SN54S113 SN74 SN74LS113A SN74S112 SN74S113
Contextual Info: TYPES SN54LS113A, SN54S113, SN74LS113A, SN74S113 DUAL J -K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET REVISED DECEMBER 1983 F u lly B u ffe re d to O ffe r M a x im u m Isola tio n fro m E xtern al D is tu rb a n c e S N 5 4 L S 1 1 3 A , S N 5 4 S 1 1 3 . . . J OR W PACKAG E

SN54LS11

Abstract: SN54S11 SN74LS11 SN74S11
Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: TYPES SN54H11, SN54LS11, SN54S11, SN74H11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES R E V IS E D A P R IL 1 S 8 5 Dependable Texas Instruments Quality and Reliability SN54H11 . . . J PACKAGE SN 54LS11, SN 54 S1 1 . . . J OR W PACKAGE SN 74H11 . . . J OR N PACKAGE

Contextual Info: SN54LS114A. SN54S114, SN74LS114A, SN74S114A DUAL J K NEGATIVE EDGE TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK _ MARCH 1973 —REVISED MARCH 1988 • Fully B u ffe re d to O ffe r M a x im u m Isolation

Contextual Info: g MOTOROLA SN54LS11 SN74LS11 R R R H R R R s n> TRIPLE 3-INPUT AND GATE LU LU LU LU LU LU LU LO W POW ER SCHO TTKY J Suffix — Case 632-07 (Ceramic) N Suffix — Case 646-05 {Plastic) GUARANTEED OPERATING RANGES SYM BO L MIN TYP MAX UNIT V CC Supply Voltage

Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

JM38510/01405BEA

Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

74s113a

Abstract: SN74LS113 74ls113a
Contextual Info: SN54LS113A, SN54S113, SN74LS113A, SN74S113A DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET D2661, APRIL 1982 - REVISEO MARCH 1988 Fully Buffered to Offer Maximum Isolation from External Disturbance S N 5 4 L S 1 1 3 A , S N 5 4 S 1 1 3 . . . J OR W P A C K A G E

54s112

Abstract: 74LS112A 74S112
Contextual Info: SN54LS112A, SN54S112, SN74LS112A. SN74S112A DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR _ Fully Buffered to Offer Maximum Isolation from External Disturbance • D 2 6 6 1 . A P R IL 1 9 8 2 - R E V I S E D M A R C H 1 9 8 8

54H11

Abstract: LS11 SN54LS11 SN54S11 SN74H11 SN74LS11 SN74S11
Contextual Info: TYPES SN54H11, SN54LS11, SN54S11, SN74H11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES REV ISED APRIL 19SS Package Options Include Both Plastic and Ceram ic Chip Carriers in A ddition to Plastic and Ceram ic DIPs SN 54H 11 P A C K A G E S N 5 4 L S 1 1. S N 5 4 S 1 1 . . . J O R W P AC KA G E

SN-74LS11N

Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

SN74LS11

Abstract: SN54LS11 SN54S11 SN74S11
Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: g MOTOROLA SN54LS114A SN74LS114A D ESCRIPTIO N — The S N 5 4 L S / 7 4 L S 1 14 A offers common clock and common clear inputs and individual J r K, and set inputs. These m onolithic dual flip-flops are designed so that w hen the clock goes HIGH, the inputs are enabled and data w ill be accepted. The logic level

Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

SN-74LS11N

Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: SN54LS113A, SN54S113, SN74LS113A, SN74S113A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET D2661, APRIL 1982 - REVISED MARCH 1988 Fully Buffered to Offer Meximum Isolation from External Disturbance SNS4LS113A. SN54S113 . . . J OR W PACKAGE SN74LS113A. SN74S113A . . . O OR N PACKAGE

Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

SN54LS114A

Abstract: SN54S114 SN74LS114A SN74S114A
Contextual Info: SN54LS114A, SN54S114, SN74LS114A, SN74S114A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK SDLS010 – MARCH 1973 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

Contextual Info: SN54LS11, SN54S11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES SDLS131 – APRIL 1985 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments