SMPTE424M Search Results

Contextual Info: High Definition MUSA VJF1224HDM FEATURES • Enhanced performance  Standard MUSA compatibility  Choice of panel colours Our Musa connectors have been redesigned to give improved performance up to 3 Gbit/s. Return loss is better than –15dB up to 1.5Ghz and better than –10dB up to 3Ghz as required by SMPTE424M.

Contextual Info: EQCO30T5.2 EQCO30T5.2 3G/HD-SDI Video Cable Driver Features: Introduction: • Compatible with all SMPTE3G SDI Data Rates: - SMPTE259M SDI, 143 to 360 Mbps - SMPTE344M, 540 Mbps - SMPTE292M HD-SDI, 1.485 Gbps - SMPTE372M Dual-Link HD-SDI, 2.97 Gbps - SMPTE424M Dual-Speed 3G-SDI, 2.97 Gbps

Contextual Info: Video Patch Panels and Accessories High Definition MUDIGSA FEATURES •      Meets and exceeds SMPTE424M Mudigsa style connectors Proven reliability High density, up to 2 x 32 Choice of panel colours Full range of accessories

OC48

Abstract: SSTL-15 SSTL-18
Contextual Info: Arria II Device Handbook Volume 3: Device Datasheet and Addendum Arria II Device Handbook Volume 3: Device Datasheet and Addendum 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V3-4.0 Document last updated for Altera Complete Design Suite version:

crpa

Abstract: HD-SDI over sdh SSTL-15 HIV54001-1 SSTL-18 HC4GX35FF1517N M144K
Contextual Info: HardCopy IV Device Handbook, Volume 4 101 Innovation Drive San Jose, CA 95134 www.altera.com HC4_H5V4-1.0 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

GTP-32

Contextual Info: Datasheet XVP-3901-DPI Densité Digital Program Insertion 3G/HD/SD DPI Inserter/Extractor with Frame Sync Space-saving, modular platform for advanced signal processing. The XVP-3901-DPI from Grass Valley, a Belden Brand, is the perfect solution for digital program

AIIGX53001-3

Abstract: half bridge converter 2kw higig pause frame EP2AGX65 EP2AGX65DF29 HDTV transmitter receivers block diagram 32-Bit Parallel-IN Serial-OUT Shift Register prbs parity checker and generator SILICON General 741 PMD Motion
Contextual Info: Arria II GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-3.0 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

prbs parity checker and generator

Abstract: AGX51001-2 0278 xf Verilog DDR memory model
Contextual Info: Section I. Arria GX Device Data Sheet This section provides designers with the data sheet specifications for Arria GX devices. They contain feature definitions of the transceivers, internal architecture, configuration, and JTAG boundary-scan testing information, DC operating

HD-SDI over sdh

Abstract: GR-253-CORE PRBS31 SMPTE292M SSTL-15 SSTL-18
Contextual Info: 1. Arria II GX Device Datasheet AIIGX53001-3.0 This chapter describes the electrical and switching characteristics of the Arria II GX device family. This chapter contains the following sections: • “Electrical Characteristics” on page 1–1 ■ “Switching Characteristics” on page 1–12

hd-SDI driver

Abstract: HD-SDI over sdh PCI 1350 HIV54001-1 SSTL-15 SSTL-18 PRBS24
Contextual Info: Section I. HardCopy IV Device Datasheet This section provides the datasheet for the HardCopy IV device family. This section includes the following chapter: • Chapter 1, DC and Switching Characteristics of HardCopy IV Devices Revision History Refer to each chapter for its own specific revision history. For information on when

transistor gx 734

Abstract: 1451 encoder bst 1046 Crossbar Switches SONET SDH vhdl code for 16 prbs generator din 2768 rx2 1107 MA1567
Contextual Info: Section I. Stratix II GX Device Data Sheet This section provides designers with the data sheet specifications for Stratix II GX devices. They contain feature definitions of the transceivers, internal architecture, configuration, and JTAG boundary-scan testing information, DC operating conditions, AC timing

GS2978

Abstract: 140608 GS2978-CNE3 M0220 SMPTE-424M Gennum GS2978 424M gs2978cne3 GS2978-C marking code 5P5
Contextual Info: GS2978 HD-LINX III Multi-Rate Dual Slew-Rate Cable Driver GS2978 Data Sheet Features Description • SMPTE 424M, SMPTE 292M, SMPTE 344M and SMPTE 259M compliant The GS2978 is a high-speed BiCMOS integrated circuit designed to drive one or two 75Ω co-axial cables.

EP2AGX260EF

Abstract: "switch power supply" handbook
Contextual Info: Arria II GX Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-1.1 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

PMD 1000

Abstract: IC ax 2008 USB FM PLAYER ,national semiconductor Linear brief lb-3 EP4SGX230KF40 pin DIAGRAM OF DIP TOP 244 PN bc 1024 cq 724 g diode FM transmiter 10PIN fm recevier project report mbp schematic
Contextual Info: Stratix IV Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-2.0 Copyright 2008 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

Contextual Info: Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V4-5.1 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.

TCO 706

Abstract: GX 6107
Contextual Info: 4. DC and Switching Characteristics AGX51004-1.4 Operating Conditions Arria GX devices are offered in both commercial and industrial grades. Both commercial and industrial devices are offered in -6 speed grade only. This chapter contains the following sections:

tsmc design rule 40-nm

Contextual Info: Stratix IV Device Handbook Volume 1 Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.2 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.

RX2 0832

Abstract: UNSIGNED SERIAL DIVIDER using verilog
Contextual Info: Section I. Arria GX Device Data Sheet This section provides designers with the data sheet specifications for Arria GX devices. They contain feature definitions of the transceivers, internal architecture, configuration, and JTAG boundary-scan testing information, DC operating conditions, AC timing parameters, a reference

Contextual Info: LatticeECP5 Family Handbook HB1012 Version 01.0, March 2014 Table of Contents LatticeECP5 Family Handbook Section I. LatticeECP5 Family Data Sheet Introduction Features . 1-1

8 bit alu in vhdl mini project report

Abstract: DDR3 layout guidelines lfe3-17ea-6fn484c lfe3-35 LFE3-17EA-7FTN256C LFE3-17EA-6FTN256C HB1009 LFE3-70EA-6FN672C DDR3 layout LFE395
Contextual Info: LatticeECP3 Family Handbook HB1009 Version 04.1, January 2012 LatticeECP3 Family Handbook Table of Contents January 2012 Section I. LatticeECP3 Family Data Sheet Introduction Features . 1-1

OC48

Abstract: SSTL-15 SSTL-18
Contextual Info: Section I. Device Datasheet and Addendum for Arria II Devices This section provides information about the Arria II device family datasheet and addendum. This section includes the following chapters: • Chapter 1, Device Datasheet for Arria II Devices ■

Contextual Info: Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.6 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as

9a21

Contextual Info: Arria II Device Handbook Volume 1: Device Interfaces and Integration Arria II Device Handbook Volume 1: Device Interfaces and Integration 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-4.4 Document last updated for Altera Complete Design Suite version:

HSTL standards

Abstract: hard disk SATA pcb schematic hard disk SATA schematic 10G BERT ATX 2005 schematic diagram handbook texas instruments hd-SDI deserializer LVDS linear application handbook national semiconductor repeater 10g passive verilog code for max1619
Contextual Info: Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.0 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other