SCES11 Search Results

Contextual Info: SN74ALVC125 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES110D – JULY 1997 – REVISED DECEMBER 1998 D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

SN74ALVC1G125

Contextual Info: SN74ALVC1G125 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES113C - JULY 1997 - REVISED JANUARY 1998 • EPIC Enhanced-Performance Implanted CMOS Submicron Process • Packaged in Plastic Small-Outline Transistor Package dck package (TOP VIEW) — i-T- O "

A115-A

Abstract: C101 SN74ALVCH374 SN74ALVCH374N
Contextual Info: SN74ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

A115-A

Abstract: C101 SN74ALVCH373 SN74ALVCH373DW 74ALVCH373
Contextual Info: SN74ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

VB245

Abstract: SN74ALVCH245 SN74ALVCH245DGVR SN74ALVCH245DW SN74ALVCH245DWR SN74ALVCH245NSR SN74ALVCH245PW SN74ALVCH245PWR
Contextual Info: SN74ALVCH245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES119G – JULY 1997 – REVISED SEPTEMBER 2004 FEATURES • • • • • DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.4 ns at 3.3 V ±24-mA Output Drive at 3.3 V

Contextual Info: SN74ALVCH373 OCTAL TRANSPARENT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS SCES116G − JULY 1997 − REVISED AUGUST 2003 D D D D D D DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the

Contextual Info: SN74ALVCH244 OCTAL BUFFER/DRIVER WITH 3ĆSTATE OUTPUTS SCES112E − JULY 1997 − REVISED SEPTEMBER 2003 D D D D D D DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the

A115-A

Abstract: SN74ALVC126 SN74ALVC126D SN74ALVC126DR SN74ALVC126NSR
Contextual Info: SN74ALVC126 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES111F – JULY 1997 – REVISED MARCH 2002 D D D, DGV, NS, OR PW PACKAGE TOP VIEW Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A)

SN74ALVC125

Contextual Info: SN74ALVC125 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES110D – JULY 1997 – REVISED DECEMBER 1998 D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

SN74ALVC126

Contextual Info: SN74ALVC126 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES111E – JULY 1997 – REVISED FEBRUARY 1999 D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

Contextual Info: SN74ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES118D - JULY 1997 - R EVISED JA N U A R Y 1999 EPIC Enhanced-Performance Implanted CMOS Subm icron Process DGV, DW, OR PW PACKAGE (TOP VIEW) Bus Hold on Data Inputs Elim inates the

Contextual Info: SN74ALVCH245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES119C - JULY 19 9 7- REVISED JANUARY 1999 DIR [ 1 A3 [ 4 ] V CC 19 ] 0E 18 ] B1 17 ] B2 A4 [ 5 16 ] B3 A5 [ 6 15 ] B4 A6 [ 7 14 ] B5 A1[ 2 A2 [ 3 Package Options Include Plastic Small-Outline DW , Thin Very

Contextual Info: SN74ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES118E – JULY 1997 – REVISED OCTOBER 1999 D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown

Contextual Info: SN74ALVC126 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES111J – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.1 ns at 3.3 V ±24-mA Output Drive at 3.3 V

74ALVCH245

Contextual Info: SN74ALVCH245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES119G – JULY 1997 – REVISED SEPTEMBER 2004 FEATURES • • • • • DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.4 ns at 3.3 V ±24-mA Output Drive at 3.3 V

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

74ALVCH244

Abstract: hspice
Contextual Info: SN74ALVCH244 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES112F – JULY 1997 – REVISED AUGUST 2004 FEATURES • • • • • • DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V

A115-A

Abstract: SN74ALVC125 SN74ALVC125D SN74ALVC125DR SN74ALVC125NSR VA125
Contextual Info: SN74ALVC125 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES110E – JULY 1997 – REVISED MARCH 2002 D D D, DGV, NS, OR PW PACKAGE TOP VIEW Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A)

Contextual Info: SN74ALVC04 HEX INVERTER SCES117H – JULY 1997 – REVISED SEPTEMBER 2002 D D D D D D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17

SN74ALVCH245

Abstract: SN74ALVCH245DGVR SN74ALVCH245DW SN74ALVCH245DWR SN74ALVCH245NSR SN74ALVCH245PW SN74ALVCH245PWR
Contextual Info: SN74ALVCH245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES119G – JULY 1997 – REVISED SEPTEMBER 2004 FEATURES • • • • • DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.4 ns at 3.3 V ±24-mA Output Drive at 3.3 V

Contextual Info: SN74ALVCH244 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES112F – JULY 1997 – REVISED AUGUST 2004 FEATURES • • • • • • DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V

Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2

A115-A

Abstract: SN74ALVCH244 SN74ALVCH244DW SN74ALVCH244DWR SN74ALVCH244NSR
Contextual Info: SN74ALVCH244 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES112F – JULY 1997 – REVISED AUGUST 2004 FEATURES • • • • • • DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V

A115-A

Abstract: C101 SN74ALVC00 SN74ALVC00RGYR
Contextual Info: SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G – JULY 1997 – REVISED AUGUST 2004 • FEATURES Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per JESD 17 14 2