SCAS536 Search Results

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCAS536B – SEPTEMBER 1995 – REVISED SEPTEMBER 1996 D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

SN54AC08

Abstract: SN74AC08 SN74AC08D SN74AC08DBR SN74AC08DR SN74AC08N SN74AC08NSR SN74AC08PW SN74AC08PWR
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

ac08 012

Abstract: 876-1501
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCAS536C – SEPTEMBER 1995 – REVISED OCTOBER 2002 D D D 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5 10

SN54AC08

Abstract: SN74AC08 SN74AC08D SN74AC08DBR SN74AC08DR SN74AC08N SN74AC08NSR SN74AC08PW SN74AC08PWR
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

SN54AC08

Abstract: SN74AC08 SN74AC08D SN74AC08DBR SN74AC08DR SN74AC08N SN74AC08NSR SN74AC08PW SN74AC08PWR
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

SN54AC08

Abstract: SN74AC08 SN74AC08D SN74AC08DBR SN74AC08DR SN74AC08N SN74AC08NSR SN74AC08PW SN74AC08PWR
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

SN54AC08

Abstract: SN74AC08 SN74AC08D SN74AC08DBR SN74AC08DR SN74AC08N SN74AC08NSR SN74AC08PW SN74AC08PWR
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

SN54AC08

Abstract: SN74AC08 SN74AC08D SN74AC08DBR SN74AC08DR SN74AC08N SN74AC08NSR SN74AC08PW SN74AC08PWR
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

SN54AC08

Abstract: SN74AC08 SN74AC08D SN74AC08DBR SN74AC08DR SN74AC08N SN74AC08NSR SN74AC08PW SN74AC08PWR
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

SN74AC08NSR

Abstract: SN74AC08PW SN74AC08PWR SN54AC08 SN74AC08 SN74AC08D SN74AC08DBR SN74AC08DR SN74AC08N
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

ac08

Abstract: SN54AC08 SN74AC08 SN74AC08D SN74AC08DBR SN74AC08DR SN74AC08N SN74AC08NSR SN74AC08PW SN74AC08PWR
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

AC08

Abstract: SN54AC08 SN74AC08
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCAS536 - SEPTEMBER 1995 EPIC Enhanced-Performance Implanted CMOS 1-jjm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK) and

MS-001

Abstract: SN54AC08 SN74AC08 AC08 MPDI002A
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCAS536B – SEPTEMBER 1995 – REVISED SEPTEMBER 1996 D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

SN54AC08

Abstract: SN74AC08 SN74AC08D SN74AC08DBR SN74AC08DR SN74AC08N SN74AC08NSR SN74AC08PW SN74AC08PWR
Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V SN54AC08 . . . FK PACKAGE TOP VIEW 1 14 2 13 3 12 4 11 5