SCAA012A Search Results

transistor w2d

Abstract: LG monitor 14 inch wiring diagram picture tube transistor w1A 3000 Watt BTL Audio Amplifier R-PDSO-G56 Package PQFP 64 PM64 transmitter tube 807 R-PDSO-G16 Package transistor w2a laptop inverter SCHEMATIC TRANSISTOR
Contextual Info: HighĆPerformance FIFO Memories Designer’s Handbook 1996 Advanced System Logic Products Printed in U.S.A. 0496 – CP SCAA012A Designer’s Handbook HighĆPerformance FIFO Memories 1996 HighĆPerformance FIFO Memories Designer’s Handbook 1996 Advanced System Logic Products

sf 127d

Abstract: 127D IC51-1324-828 SN74ABT3611 D103E
Contextual Info: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS127D - JULY 1992 - REVISED SEPTEMBER 1995 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 64 x 36 Clocked FIFO Buffering Data From Port A to Port B Mailbox-Bypass Register In Each Direction

SMD W2T

Abstract: w2t smd BTS 131 SMD MBA IST DATE SHEET SN54ACT3632
Contextual Info: • fl^bi723 aiiossT ist. ■ SN54ACT3632 512x36x2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY _ _ S G B S310-SEPTEM BER 1996 * Free-Running CLKA and CLKB Can Be Asynchronous or Coincident ► Two Independent 512 x 36 Clocked FIFOs

Contextual Info: SN74ACT2236 1024 x 9 x 2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS149A- APRIL 1990 - REVISED SEPTEMBER 1995 I n d e p e n d e n t A s y n c h r o n o u s I nput s and Outputs A c c e s s T i m e s o f 2 5 ns With a 5 0 -pF Load L o w - P o w e r A d v a n c e d C M O S T e c hn o l o g y

Contextual Info: SN74ACT2226, SN74ACT2228 D U A L 6 4 x 1 , D U A L 256 x 1 C L O C K E D FIRST-IN, FI RST - OUT M E M O R I E S S C A S 219B -JU N E 1 9 9 2 - REVISED SEPTEMBER 1995 DW PACKAGE TOP VIEW • Dual I ndepen d en t FIFOs Or ga ni z e d as: 64 W o r d s by 1 Bi t Each - S N74ACT2226

pdic cd

Contextual Info: SN74ABT361 3 64 x 36 C L O C K E D F I R ST - I N, F I R S T - O U T M E M O R Y WITH BUS M A T C H IN G AND BYTE S W A P P I N G SC B S 128E -JU LY 1 9 9 2 - REVISED FEBRUARY 1996 F r e e - R u n n i n g C L K A and C L K B Can Be M i c r o p r o c e s s o r I nt er fac e Co nt rol Logic

T3611

Contextual Info: C L O C K E D FI RST- 1 S N 7 4 A B T3611 64 x 3 6 FIRST-OUT M E M O R Y SCBS127D-JULY 1992 - REVISED SEPTEMBER 1995 F r e e - R u n n i n g C L K A and C L K B Can Be E m p t y Flag EF and A l m o s t - E m p t y A s y n c h r o n o u s or C o i n c i d e n t

A35 SMD

Abstract: smd transistor b35 SN54ACT3632 Texas Instruments TTL handbook
Contextual Info: SN54ACT3632 512 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SGBS310 – SEPTEMBER 1996 D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 512 × 36 Clocked FIFOs Buffering Data in Opposite Directions Mailbox-Bypass Register for Each FIFO

SN74ACT2235

Abstract: SN74ACT2236
Contextual Info: SN74ACT2236 1024 x 9 × 2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS149A – APRIL 1990 – REVISED SEPTEMBER 1995 D D D D D D D D D D D D Independent Asynchronous Inputs and Outputs Low-Power Advanced CMOS Technology Bidirectional 1024 Words by 9 Bits Each

IC51-1324-828

Abstract: SN74ACT3622 SN74ACT3632 SN74ACT3642
Contextual Info: SN74ACT3632 512 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS224C – JUNE 1992 – REVISED SEPTEMBER 1995 D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 512 × 36 Clocked FIFOs Buffering Data in Opposite Directions

ON B34

Abstract: SN74ACT3632 SN74ACT3642 IC51-1324-828 SN74ACT3622
Contextual Info: SN74ACT3632 512 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS224C – JUNE 1992 – REVISED SEPTEMBER 1995 D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 512 × 36 Clocked FIFOs Buffering Data in Opposite Directions

af b7

Abstract: SN74ACT2235 SN74ACT2236
Contextual Info: SN74ACT2236 1024 x 9 × 2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS149A – APRIL 1990 – REVISED SEPTEMBER 1995 D D D D D D D D D D D D Independent Asynchronous Inputs and Outputs Low-Power Advanced CMOS Technology Bidirectional 1024 Words by 9 Bits Each

B633C

Abstract: ACT2236-20
Contextual Info: SN74ACT2236 1024 x 9 x2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCASI 49A - APRIL 1990 - REVISED SEPTEMBER 1995 Independent Asynchronous Inputs and Outputs Access Times of 25 ns With a 50-pF Load Data Rates From 0 to 50 MHz Low-Power Advanced CMOS Technology

Texas Instruments TTL handbook

Abstract: D1044 SN74ACT2235 SN74ACT2236
Contextual Info: SN74ACT2235 1024 x 9 x 2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS148C - DECEMBER 1990 - REVISED SEPTEMBER 1995 • Independent Asynchronous Inputs and Outputs • Low-Power Advanced CMOS Technology • Bidirectional GND FN PACKAGE TO P VIEW

IC51-1324-828

Abstract: SN74ACT3622 SN74ACT3632 SN74ACT3642
Contextual Info: SN74ACT3622 256 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS247C – AUGUST 1993 – REVISED SEPTEMBER 1995 D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent Clocked FIFOs Buffering Data in Opposite Directions

ATM machine working circuit diagram

Abstract: ATM machine using microcontroller w54 transistor MC68302 SN74ACT53861 bit-slice SCAA026A
Contextual Info: MultipleĆQueue FirstĆIn, FirstĆOut Memory SN74ACT53861 Application Report 1996 Advanced System Logic Products Printed in U.S.A. 0596–CP SCAA026B MultipleĆQueue FirstĆIn, FirstĆOut Memory SN74ACT53861 Application Report 1996 Advanced System Logic Products

Contextual Info: SN74ACT3638 512 x 32 x 2 C L O C K E D B I D I R E C T I O N A L FI RST-I N, F I R S T - O U T M E M O R Y S C A S 228C -JU N E 1 9 9 2 - REVISED SEPTEMBER 1995 F r e e - R u n n i n g C L K A and C L K B Can Be IRA, O R A , AEA , and A F A Flags A s y n c h r o n o u s or C o i n c i d e n t

Contextual Info: SN54ACT3641 1 024 x 36 C L O C K E D FI RST-I N, F I R S T - O U T M E M O R Y S G B S 309-A U G U S T 1995 • • F r e e - R u n n i n g C L K A and C L K B Can Be • O u t p u t - R e a d y O R and A l m o s t - E m p t y (AE) Flags Synchronized by CLKB

IC51-1324-828

Abstract: SN74ACT3622 SN74ACT3632 SN74ACT3642
Contextual Info: SN74ACT3622 256 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS247C – AUGUST 1993 – REVISED SEPTEMBER 1995 D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent Clocked FIFOs Buffering Data in Opposite Directions

GBA-2

Abstract: SN74ACT2235 SN74ACT2236
Contextual Info: SN74ACT2235 1024 x 9 × 2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS148C – DECEMBER 1990 – REVISED SEPTEMBER 1995 D D D D D D FN PACKAGE TOP VIEW A2 A1 A0 GND GBA SBA SAB GAB GND B0 B1 D D D D Independent Asynchronous Inputs and Outputs

Texas Instruments TTL handbook

Abstract: Design Seminar Signal Transmission Texas Instruments TTL data book act 16245 SDZAE06 SCAD001C LVC Low-Voltage BiCMOS Technology SLLD001A 16245 MO-194
Contextual Info: Digital Design Seminar Advanced Logic Trends GEBE \DDS\Trends.ppt Aug96 Digital Design Seminar Complete Spectrum of Logic Solutions from Texas Instruments LS TTL 5V 3.3 V S ALVC AC ALB LVT LVC ALVT AC/T LV CBT HC/T ABT 74F ALS ETL PCI BCT AS SPECIALTY FIFO

diode b27

Abstract: IC51-1324-828 SN74ABT3614
Contextual Info: SN74ABT3614 64 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING SCBS126F – JUNE 1992 – REVISED FEBRUARY 1996 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 64 × 36 Clocked FIFOs

IC51-1324-828

Abstract: SN74ACT3631 SN74ACT3641 SN74ACT3651
Contextual Info: SN74ACT3651 2048 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS439A – JUNE 1994 – REVISED SEPTEMBER 1995 D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Synchronous Read-Retransmit Capability

IC51-1324-828

Abstract: SN74ABT3611
Contextual Info: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS127D – JULY 1992 – REVISED SEPTEMBER 1995 D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 64 × 36 Clocked FIFO Buffering Data From Port A to Port B Mailbox-Bypass Register In Each Direction