RGB525 Search Results

RGB525

Abstract: E4RE
Contextual Info: RGB525 3.0 M o d e s o f O pe ratio n Pixel da ta can come from the VGA port or the VRAM pixel port, as selected by the P O R T SEL bit of the M is ­ cellaneous Contr ol 2 register. If the VRAM pixel p ort is selected, the pixel f o r m a t can be 4 B P P bits p e r pixel , 8 BPP, 15/16 BPP, 24 B P P

RGB525

Contextual Info: RGB525 16.0 C h a n g e S u m m a r y Table 19. Sum m ary o f C hanges D a te C hanges 9/9 3 1. 3/9 4 1. F i r s t p u b l i c a t i o n , P R E L I M I N A R Y i n f o r m a t i o n p r i o r to p r o d u c t b u i l d . M o v e d / C h a n g e d s o m e p i n a s s i g n m e n t s to m i n i m i z e c h a n c e o f c o u p l i n g fr o m c a r d w i r i n g to P L L s u p p o r t

rgb525

Contextual Info: RGB525 14.0 P a c k a g e I n f o r m ation 1-2 1 3 3 0.0 0 1. 197 (30 .4 0 ' 15.0 O r d e r i n g In f o r m a t i o n Table 18. Part N um bers Part N um ber Speed I BM 3 7 - RGB5 2 5 L - 1 7 C C 170 MH z IB M3 7- RGB5 25L-22CC 220 MH z I B M 3 7 - R G B 5 2 5 L - 2 5 C C (*

RGB525

Contextual Info: RGB525 4.0 Controls 4.1 B l a n k a nd B o r d e r C on t r o l T h e B L A N K a n d B O R D E R s i g n a l s c o n t r o l the w a y in whi c h d a t a is p r e s e n t e d to t he D A C s . T h e s e cont r ol s i g ­ n a l s a r e u s e d to d e t e r m i n e w h e n p i x e l d a t a is v a l i d ,

0x008F

Abstract: 0x0070 0x0091 0X0044 0X00
Contextual Info: RGB525 9.0 I nt er nal R e g i s t e r - S u m m a r y Ta bk', ÿ is a s u m m a r y of the in t e r n a l registers, with more detailed descriptions for the D irect Access Re g is ­ ters, Ind ex ed Registers, Pixel R e p re s e n ta t io n , F r e ­ quen cy Selection, Cursor, B o rder Color a nd Diagnostic

RGB525

Abstract: 6208T
Contextual Info: RGB525 11.0 Pin D e s c r i p t i o n s T a b le 10. Pin D e s c r i p t i o n s Signal ¡lili Description C l o c k s a n d C lo c k C o n t r o l s REFCLK I 121 R e f e r e n c e Cl ock. A fixed f r e q u e n c y o f 2 M H z to 1 0 0 M H z appl i ed to t hi s pin

Contextual Info: RGB525 12.0 E lectrical and T im in g S p e c i f i c a t i o n s Table 12. R ecom m ended Operating C o n d itio n s 170 M H z Param eter 220 M H z 250 M H z 250 M H z S ym bol Units Min. Power S upply Max. M i n. Max. M i n. Max. Min. Max. V DD , D A C V D D , P L L V D D

RGB525

Contextual Info: RGB525 1.0 M icroprocessor Access As s e e n o n t h e m i c r o p r o c e s s o r b u s t h e r e a r e e i g h t I/O a d d r e s s e s , s e l e c t e d b y RS[ 2: 0] . T w o i n d i r e c t s c h e m e s a r e u s e d to a c c e s s a l l o f t h e i n t e r n a l r e g i s t e r s a n d a r r a y s

RGB525

Contextual Info: RGB528A Appendix O n th e RGB525 b it 4 o f th e P L L C o n tro l 1 re g iste r selects th e reference source o f th e P L L , R E F C L K or E X T C L K . On th e R G B 528A th is b it is reserved. A.0 Relationship to RGB525 B its 7 - 6 of th e M iscellaneous C o n tro l 2 register

Contextual Info: RGB525 13.0 Video W aveform s WHITE BLACK BLANK SYNC T ab le 16. C o m p o s i t e V i d e o O u t p u t W a v e fo r m D o u b l y t e r m i n a t e d 75 o h m s , R R E F = 6 9 8 o h m s Sync No No Yes Yes Pedestal No Yes No Yes Value IRE WHITE mA V 18.6 5

RGB525

Contextual Info: RGB525 10.0 Pixel Mask Register Descriptions / 10.1 7 6 T h e d i r e c t a c c e s s r e g i s t e r s a r e a d d r e s s e d u s i n g RS[ 2 : 0 ] inputs. RS[2:0]: 010 Access: Read/Write Bits 7 • 0 6 5 4 3 2 1I f W R IT E A d d re s s S 2 1I / Pixel M ask

RGB524

Abstract: ibm comp M5F11 IBM vga registers
Contextual Info: IBM RGB524 170/220 MHz High Performance Palette DAC Product Description Product Highlights The RGB524TM High Performance Palette DAC from IBM brings the high quality and advanced capabilities of the previous generation RGB525 to a more compact package footprint,

RGB525

Contextual Info: RGB525 5.0 C ursor Operation T h e c u r s o r is a 3 2 x 3 2 or 6 4 x 6 4 pi x e l p a t t e r n t h a t is o v e r l ai d on t he d i s p l a y pi xe l s j u s t b e f or e p r e s e n t a t i o n to t he D A C s . T h e c u r s o r s i ze, 3 2 x 3 2 or 6 4 x 6 4 is s e t wi t h

RGB525

Contextual Info: RGB525 8.0 8.1 D i a g n o s t ic S u p p o r t 8.3 Data M asks E a c h D A C o u t p u t is c o n n e c t e d to a c o m p a r a t o r . B o t h l a t c h e d a n d u n l a t c h e d c opi e s of t he c o m p a r a t o r o u t p u t s c a n be r e a d f rom t he D A C S e n s e r e g i s t e r . T h e l og i c a l

RGB525

Contextual Info: RGB525 T a b le of C o n t e n t s P r o d u c t D e s c r ip tio n . 1 P r o d u c t H ig h lig h t s . 1 A p p lic a tio n s . 1 F u n c tio n a l B lo c k D ia g ra m

Contextual Info: RGB514 150/170/220 MHz High Performance Palette DAC Product Description The RGB514 High-Performance Palette DAC solves the tra­ ditional compromise between display resolution and displayed colors. Implemented in IBM Microelectronics’ 0.8 micron CMOS technology, the RGB514 eliminates the bandwidth and

Contextual Info: RGB624/RGB624DB 1.0 Microprocessor Access As seen on th e m icroprocessor bus th e re are eight I/O addresses, selected by RS[2:0]. Two indirect schemes are used to access all of th e in te rn a l registers and arrays through th ese eight prim ary I/O addresses.

Contextual Info: RGB528A 1.0 Microprocessor Access As seen on the microprocessor bus there are eight I/O addresses, selected by RS[2:0], Two indirect schemes are used to access all of the internal registers and arrays through these eight primary I/O addresses. The first scheme is standard VGA, and operates when

RGB524

Abstract: RGB526/RGB526DB
Contextual Info: RGB526/RGB526DB 1.0 Microprocessor Access As seen on th e m icroprocessor bus th e re are eight I/O addresses, selected by RS[2:0]. Two indirect schemes are used to access all of th e in te rn a l registers and arrays through th ese eight prim ary I/O addresses.

RGB514

Abstract: RGB528A
Contextual Info: RGB528A B.O Switching Into VGA Mode The RGB528A has two fundam ental modes of operation which depend on the input pixel port selected, VGA or V R A M . The port is selected w ith the "PORT SEL" bit bit 0 of Miscellaneous Control 2 register. But now set bits 7 and 6 to ’00' (PC LK SEL =

RGB624

Contextual Info: RGB624/RGB624DB E.O Switching Into VGA Mode The R G B624/RGB624DB has two fundam ental modes of operation which depend on the input pixel port selected, VGA or V R A M . The port is selected w ith the "PORT SEL” b it bit 0 of Miscellaneous Control 2 register.

Contextual Info: POWER 9100 GRAPHICS CONTROLLER August 22, 1994 Chapter 1. Technical Overview Single-Chip 2-D Graphics Accelerator Powerful Graphics Features O Ultra-high-speed local-bus display controller uses w orkstation display technology to give m aximum acceleration w ith graphical user interfaces such as

37rgb

Abstract: rgb525 RGB524 pix15
Contextual Info: RGB524 1.0 Microprocessor Access As seen on the microprocessor bus there are eight I/O addresses, selected by RS[2:0], Two indirect schemes are used to access all of the internal registers and arrays through these eight primary I/O addresses. The first scheme is standard VGA, and operates when