PCK953 Search Results
PCK953 Datasheets (19)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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| PCK953 | NXP Semiconductors | Memory interfaces; Support logic for memory modules and other memory subsystems | Original | 616.55KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953 | Philips Semiconductors | PCK953 50-125 MHz PECL input-9 CMOS output 3.3 V PLL clock driver | Original | 68.85KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953B | Philips Semiconductors | 50-125 MHz PECL input/9 CMOS output 3.3 V PLL clock driver | Original | 68.79KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD | NXP Semiconductors | 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver | Original | 85.17KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD | Philips Semiconductors | 50-125 MHz PECL input/9 CMOS output 3.3 V PLL clock driver | Original | 68.86KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD | Philips Semiconductors | 20-125 MHz PECL Input/9 CMOS Output 3.3 V PLL Clock Driver | Original | 73.28KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD/01,118 | NXP Semiconductors | PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Reel Pack, SMD, 13" | Original | 85.19KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD/01,128 | NXP Semiconductors | PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Reel Pack, SMD, 13", Turned | Original | 85.19KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD/01,151 | NXP Semiconductors | PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Tray Pack, Bakeable, Single | Original | 85.19KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD/01,157 | NXP Semiconductors | PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Tray Pack, Bakeable, Multiple | Original | 85.19KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD,118 | NXP Semiconductors | 20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Reel Pack, SMD, 13" | Original | 85.42KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD,128 | NXP Semiconductors | 20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Reel Pack, SMD, 13", Turned | Original | 85.42KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD,151 | NXP Semiconductors | 20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Tray Pack, Bakeable, Single | Original | 85.42KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD,157 | NXP Semiconductors | 20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Tray Pack, Bakeable, Multiple | Original | 85.42KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD/G | NXP Semiconductors | 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver | Original | 85.17KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD/G,128 | NXP Semiconductors | 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver; Package: SOT358-1 (LQFP32); Container: Reel Pack, SMD, 13", Turned | Original | 85.42KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD/G-F | NXP Semiconductors | 20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V | Original | 85.42KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD-T | NXP Semiconductors | 20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V | Original | 85.42KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| PCK953BD-T | Philips Semiconductors | 20-125 MHz PECL input / 9 CMOS output 3.3 V PLL clock driver | Original | 73.21KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953 Price and Stock
NXP Semiconductors PCK953BD/G,128Clock Driver, 953 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PQFP32 |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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PCK953BD/G,128 | 6,691 |
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Get Quote | |||||||
PCK953 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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LQFP32
Abstract: PCK953 PCK953BD
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pck953lqfp32pck953bd | |
9352 679 41157
Abstract: LQFP32 footprint LQFP32 MS-026 PCK953 PCK953BD SOT358-1
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pck9539352 679 41157lqfp32 footprintlqfp32+3 | |
SW00624Contextual Info: INTEGRATED CIRCUITS PCK953 50–125 MHz PECL input/CMOS output 1:8 SDRAM clock driver Product specification Philips Semiconductors 2000 Oct 25 Philips Semiconductors Product specification 50–125 MHz PECL input/CMOS output 1:8 SDRAM clock driver 25 GNDO 26 Q0 |
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pck953sw00624 | |
LQFP32
Abstract: PCK953 PCK953BD
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pck953icl03lqfp32pck953bd | |
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Contextual Info: PCK953 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver Rev. 05 — 9 October 2008 Product data sheet 1. General description The PCK953 is a 3.3 V compatible, PLL-based clock driver device targeted for high performance clock tree designs. With output frequencies of up to 125 MHz, and output |
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pck953 | |
PCK953
Abstract: LQFP32 PCK953BD
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pck953lqfp32pck953bd | |
SC28L198
Abstract: SCC2691AC1A28 LCD 09151 CSOT109 PCA9552 PCK2002 PCF8591 APPLICATION pecl clock so8 PCA9550 PCA9553
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sc28l198scc2691ac1a28lcd 09151csot109+6 | |
schematic diagram atx Power supply 500w
Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
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p462-ndp463-ndlng295lfcp2ulng395mftp5u+11 | |
DDR2 SSTL class
Abstract: SSTL_18 DDR1-400 DDR2 SDRAM with SSTL_18 interface TVSOP-48 SSTL-18 PCK2059 SSTV16857 DDR200 hp SSTU32866
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pc100pc133pck2509pck2510+15 | |
BUK2114
Abstract: BUK2114-50SYTS saa7117 SAA7136E MPSA92 168 saa7136 buk2914-50syts TDA8920BTH bu4508dx KMZ52
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1n41481n45311n47xxa1ps10sb62+16 | |
74ALVCHS162830Contextual Info: INTEGRATED CIRCUITS 74ALVCHS162830 18-bit to 36-bit address driver with bus hold 3-State Product data Philips Semiconductors 2001 Oct 11 Philips Semiconductors Product data 18-bit to 36-bit address driver with bus hold (3-State) FEATURES 74ALVCHS162830 PIN CONFIGURATION |
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74alvchs16283018-bit36-bitjesd22 | |
74ALVCHS162830
Abstract: 2Y16
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74alvchs16283018-bit36-biticl03+3 | |
220v AC voltage stabilizer schematic diagram
Abstract: LG color tv Circuit Diagram tda 9370 1000w inverter PURE SINE WAVE schematic diagram schematic diagram atx Power supply 500w TV SHARP IC TDA 9381 PS circuit diagram wireless spy camera 9744 mini mainboard v1.2 sony 279-87 transistor E 13005-2 superpro lx
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ad9272p462-ndlng295lfcp2up463-nd+11 | |
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Contextual Info: INTEGRATED CIRCUITS 74ALVCHS16830 18-bit to 36-bit address driver with bus hold 3-State Product data Supersedes data of 2001 Sep 07 File under Integrated Circuits — ICL03 Philips Semiconductors 2001 Dec 12 Philips Semiconductors Product data 18-bit to 36-bit address driver with bus hold (3-State) |
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74alvchs1683018-bit36-biticl03+1 | |
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74ALVCHS16830
Abstract: A114 JESD22
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74alvchs1683018-bit36-biticl03+3 | |