MS2S771 Search Results

206s12

Contextual Info: INTEGRATED DEVICE 3fiE D • MS2S771 O O O t “^ 3 *IDT " T - 46- 3 5 “ 8 K X 9& 1 6K X 9 IDT7M205S IDT7M206S CEMOS PARALLEL IN-OUT FIFO MODULE FEATURES: • ■ ■ • • • • • • • First-In/First-Out memory module 8K x 9 organization ID T 7 M 2 0 5 S

64x9 RAM

Contextual Info: In te g rate d D e vic e Technology, Inc. FEATURES: Out FI FO memories with clocked read and write controls. The IDT72421/72201/72211/72221/72231/72241 havea64, 256, 512, 1024, 2048, and 4096 x 9-bit memory array, respectively. These FI FOs are applicable for a wide variety of

intel i486

Abstract: IDT7MP6105 7MP6104
Contextual Info: bfiE D I S^N. • • Haas77i a n m s 3 i ?is ■ idt IDT7MP6104 128KB/256KB SECONDARY CACHE MODULE IDT7MP6105 FOR THE INTEL i486 INTEGRATED DEVICE Integrated Device Technology, Inc* FEATURES DESCRIPTION • 128 K B /2 5 6 K B d ire c t m a pped , w rite -th ro u g h , no n-sectored ,

Contextual Info: INTEGRATED DEVICE ^7 4825771 INTEGRATED D E § 4025771 Q00E7T4 5 DEVICE 97D 128K X 8 SRAM WITH LATCHED/ BUFFERED ADDRESS LINES, LATCHED/BUFFERED DATAm LINES AND REGISTERED DATAo u tLINES FEATURES: • L atch ed a n d b u ffe re d a dd re ss lines • L atch ed a n d b u ffe re d in p u t d ata lines

Contextual Info: böE D • MflSS7?l 0 Ü 1 M 1S 7 3TÖ ■ IDT I N T E G R A T E D DEVIC E HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM PRELIMINARY IDT7007S/L Integrated Device Technology. Inc FEATURES: • True Dual-Ported m em ory cells w hich allow sim ulta­ neous reads of the sam e m em ory location

Ph 4847

Abstract: 2584D
Contextual Info: INTEGRATED DEVICE SflE D • 4A2S771 32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT □OlOib'î 70fl IDT49C460 IDT49C460A IDT49C460B IDT49C460C IDT49C460D DESCRIPTION: FEATURES: • Fast Detect 12ns max. 16ns (max.) 25ns (max.) 30ns (max.) 40ns (max.) Correct

Contextual Info: bôE D • 4Ö25771 Q Q 1 3 b c13 T5b « I D T CMOS PARALLEL-SERIAL FIFO 2048 x 9, 4096 x 9 _ Integrated Device Technology, Inc. integrated FEATURES: APPLICATIONS: • • • • • • • • • • • • 35ns parallel port access time, 45ns cycle time

C3591

Abstract: R3041
Contextual Info: : « • ' " S P IDT79R3041 IDT79RV3041 IDT79R3041 IN TEG RA TED RISController™ FOR LO W -CO ST SYSTEM S Integrated D e vice T ech no logy, Inc. FEATURES: Double-frequency clock input 16.67MHz, 20MHz, 25MHz and 33MHz operation 20MIPS at 25MHz Low cost 84-pin PLCC packaging