LL7000 Search Results

LSI Product Selector Guide

Abstract: lsi logic arrays
Contextual Info: LSI LOGIC LL7000 Series Sicon-Gate HCMOS logic Arrays Features LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 95035 408.433.8000 Telex 172153 The LL7000 series of silicon-gate HCMOS logic arrays from LSI Logic Corporation exhibits bipolar speeds, while at the same time, offers low power consump­

7400 fan-out cmos

Abstract: 16x4 LL7140 TTL LS 7400 16x16 barrel shifter with flipflop LL7420 8 BIT ALU by 74181 C0036 LSI LOGIC LL7080
Contextual Info: LSI LOGIC LL7000 Seríes Sicon-Gate HCMOS Logic Arrays Description 408.433.8000 Telex 172153 The LL7000 series of silicon-gate HCMOS logic arrays from LSI Logic Corporation exhibits bipolar speeds, while at the same time, offers low power consump­ tion, high noise margins and ease of design. The

GFT1811A

Abstract: 74181 alu 74181 alu 74181 logic Alu 183 32 bit carry select adder
Contextual Info: Table of Contents - Part II The follow ing megafunctions are available in the LL7000 Series, LL9000 Series, and LSA2000 Series of channeled gate array products. M ost of these are also available in the LL5000 Series of gate arrays. M egafunction Name Type

LL8080

Abstract: 74 series family LSI LOGIC CORP LSI CMOS GATE ARRAY LL8000 weewee 7400 fan-out cmos 7400 ecl nand 7400 fan-out LL7000
Contextual Info: S - LSI LOGIC CORPORATION l'L 'l 000980 x f ?^ L L 8 0 0 0 S e rie s jiiic u n u a ie riC M O S Lo g ic A rra y s G eneral Description The LL8000 series is a fam ily o f high performance medium density HCMOS logic arrays that have been configured to be com patible with applications

No Turnaround RAM

Abstract: LSA2003 LSI Logic
Contextual Info: 5 LSI LOGIC C O R PO R A T IO N •¿-7 ' LSA 2003 tò*T w o M ic ro n H C M O S Structured A rra y 000976 G en e ra l D e s c rip tio n Arrays provide a high d e n sity o f logic fu n c tio n a lity w h ile m a in ta in in g the fle x ib ility of design and fa st

Contextual Info: GFS2020A GFS2020A GFS2020A 1 6 X 4 CAM WITHOUT MASK GENERAL DESCRIPTION: THE GFS2020A MEGAFUNCTION IS A 16-WORD BY 4-BIT CONTENT ADDRESSABLE MEMORY CAM . THIS MEGAFUNCTION IS FUNCTIONALLY IDENTICAL TO THE FAIRCHILD 100142 EXCEPT THAT IT HAS SIXTEEN WORDS INSTEAD OF FOUR AND IT HAS NO MASK FUNCTION. FOR A DETAILED

amd 2900

Abstract: Y122 Am2910 y322
Contextual Info: GFAOIOIA GFAOIOIA GFAOIOIA MICROPROGRAM CONTROLLER GENERAL DESCRIPTION: THE GFAOIOIA IS A 5-DEEP STACK, 16-BIT WIDE ADDRESS SEQUENCER WHICH CONTROLS THE SEQUENCE OF EXECUTION OF THE MICRO-INSTRUCTIONS. IT IS DESIGNED TO BE FULLY COMPATIBLE WITH THE AM2910 EXCEPT WHEN ILLEGAL OPERATIONS ARE PERFORMED ON THE STACK

Contextual Info: GFS2010A GFS2010A GFS2 01OA 8 X 4 CAM WITHOUT MASK G E N ERAL D E S C R I P T I O N : THE GFS2010A MEGAFUNCTION IS AN 8-WORD BY 4-BIT CONTENT ADDRESSABLE MEMORY CAM . THIS MKGAFUNCTION IS FUNCTIONALLY IDENTICAL TO THE FAIRCHILD 100142 EXCEPT THAT IT HAS EIGHT WORDS INSTEAD OF FOUR AND IT HAS NO MASK FUNCTION. FOR A DETAILED

LSA2000

Abstract: 74181 alu
Contextual Info: GFT1813A GFT1813A GFT1813A 32-BIT ALU GENERAL DESCRIPTION: THE GFT1813A MEGAFUNCTION IS LOGICALLY IDENTICAL TO THE TI 74181, EXCEPT IT OPERATES ON TWO 32-BIT WORDS. THE GPT1813A ARITHMETIC LOGIC UNIT ALU PERFORMS 16 LOGICAL OPERATIONS, AND USES A 32-BIT FAST CARRY-SELECT ADDER TO PERFORM 16

Contextual Info: GFB0220A GFB0220A GFB0220A 16-BIT CARRY-SELECT ADDER GENERAL D E S C R I P T I O N : THE GFB0220A USES A FAST CARRY-SELECT ALGORITHM TO PERFORM AN ADDITION OF TWO 16-BIT NUMBERS. PIN DIAGRAM: GFB0220A •GATES USED » 287 -AREA USED - 376 GATE LOCATIONS •PROPAGATION DELAY « 28 NS

TRANSISTOR a31

Abstract: magnitude comparator Transistor B29 transistor A19 P
Contextual Info: GFC2200A GFC2200A 32-BIT MAGNITUDE COMPARATOR GFC2200A GENERAL DESCRIPTION: THE GFC2200A IS A MAGNITUDE COMPARATOR. IT COMPARES TWO 32-BIT BINARY NUMBERS AND YIELDS THREE OUTPUTS {A>B, A<B„ AND A-B . PIN DIAGRAM: GFC2200A - GATES USED - 34 8 - AREA USED - 379 GATE

through data 4 a

Contextual Info: GFS0510A GFS0510A GFS0510A 16 X 4 FIFO FIRST-IN FIRST-OUT GENERAL DESCRIPTION: THE GFS0510A MEGAFUNCTION IS A 16 X 4 FIFO (FIRST-IN FIRST-OUT) . IT HAS SEPARATE READ (RDN) AND WRITE (WRN) CLOCKS WHICH ARE COMPLETELY INDEPENDENT <CAN BE ASYCHRONOUS) . THIS FIFO USES A "FALL-THROUGH“ ALGORITHM IN WHICH

P08 transistor

Abstract: 8x8 booth multiplier
Contextual Info: GFB2000A GFB2000A GFB2000A 8X8 2 'S COMPLEMENT MULTIPLIER GENERAI. DESCRIPTION: THE GFB2000A MEGAFUNCTION 15 AN 8-BY-8 2 'S COMPLEMENT MULTIPLIER WHICH GENERATES A 16-BIT PRODUCT. BY USING A MODIFIED BOOTH ALGORITHM, THIS MEGAFJNCTION GIVES A REASONABLE SPEED AND GATE COUNT.

Contextual Info: cQ ^p f'C LSI LO G IC C O R P O R A T IO N LSA 2004 c T w o M icro n H CM O S S tru ctu red A r r a y TM 000977 General Description Arrays provide a high density of logic fun ctionality while m aintaining the fle xib ility of design and fast turn-around of metal mask programmable logicarrays. The use of dual layer metal interconnect

5 pin ic ARB

Abstract: amd 2900
Contextual Info: GFA0040A GFA0040A GFA0040A STATUS AND SHIFT CONTROL UNIT GENERAL DESCRIPTION : THE GFA004 0A IS DESIGNED TO BE FUNCTIONALLY IDENTICAL TO THE AM2904 f ALTHOUGH THE I/O'S ARE DIFFERENT SEE PAGE 2 OF 3 FOR THE ENHANCEMENTS TO THE AM2904 . FOR A DETAILED FUNCTIONAL DESCRIPTION SEE THE AMD 2900 DATA BOOK.

512x 8 ROM

Abstract: 1K x 8 static ram
Contextual Info: LSA2010 ¿ ¿ 6 Tw o M icron HCMOS Structured A rra y TM LSI LO G IC 000979 c o r p o r a t io n Lòuf General Description The LSA2010 is a member of the 2-micron drawn, (1.4-micron effective HCMOS family of Structured Arrays offered by LSI LOGIC Corporation. These very

512x 8 ROM

Abstract: General Purpose Mask Programmable ROM S1985 LSA2010 1K x 8 static ram 2k x 4 RAM 1kx8 static ram 512X16 512x64 application of programmable array logic
Contextual Info: LSA 2010 l s c TWo M icron H CM O S Structured A rra y 000979 LSI L O G IC C O R P O R A T IO N TW General Description The LSA201G is a member of the 2-micron drawn, 1.4-micron effective HCMOS family of Structured Arrays offered by LSI LOGIC Corporation. These very

LSA2009

Contextual Info: LSI LOGIC C O R PO R A T IO N LS A 2 0 0 9 Csu T w o M icro n H CM O S Stru ctu red A rr a y 000978 General Description The LSA2009 is a m em ber o f the 2-m icron drawn, 1.4-micron effective HCMOS fa m ily of S tructured A rrays o ffe re d by LSI LOGIC C orporation . These very

LSA2004

Contextual Info: LSI L O G IC C O R P O R A T IO N 000977 LS A 2 0 0 4 c T w o M icron H CM O S Stru ctu red A r r a y TM General Description Arrays provide a high d e n sity o f lo g ic fu n c tio n a lity w hile m a in ta in in g the fle x ib ility o f design and fast turn-around o f m etal m ask program m able logicarrays. The use o f dual layer m etal in te rco n n e ct

transistor p06

Abstract: P08 transistor p023 transistor
Contextual Info: GFB2010A GFB2010A GFB2010A 12 X 12 2 1S COMPLIMENT MULTIPLIER GENERAL DESCRIPTION: THE GFB2010A MEGAFUNCTION IS A 12 X 12 2 1S COMPLEMENT MULTIPLIER WHICH GENERATES A 24-BIT PRODUCT. BY USING A MODIFIED BOOTH ALGORITHM, THIS MEGAFUNCTION GIVES A REASONABLE SPEED AND GATE COUNT.

16-bit alu

Abstract: functional diagram of ALU
Contextual Info: GFB1020A GFB1020A 16-BIT ALU GFB1020A GENERAL DESCRIPTION: THE GFB1020A MEGAFUNCTION IS A 16-BIT VERSION OF THE FAIRCHILD 100181 ALU, EXCEPT FOR THE ABSENCE OF THE OUTPUT LATCHES AND THE LATCH ENABLE SIGNAL. THE GFB1020A ARITHMETIC LOGIC UNIT ALU PERFORMS 4 BINARY, 4 BCD, AND 8 LOGIC OPERATIONS ON

s16 transistor

Abstract: transistor bl 187 c14 c13
Contextual Info: GFB0600A GFB0600A GFB0600A 3-PORT 16-BIT CARRY-SELECT ADDER GENERAL DESCRIPTION: THE GFB0600A IS A 3-PORT 16-BIT CARRY-SELECT ADDER. IT USES A FAST CARRYSELECT ALGORITHM TO PERFORM ADDITION OF THREE 16-BIT NUMBERS. PIN DIAGRAM: GFB0600A - GATES USED - 396

HSYNC, VSYNC, DE, input, output

Abstract: HD6845 "pin compatible" ma6# CRT controller
Contextual Info: GFM8450A GFM8450A GFM8450A CRT CONTROLLER GENERAL DESCRIPTION: THE GPMB4 50A MEGAFUNCTION IS DESIGNED TO BE FUNCTIONALLY COMPATIBLE WITH THE HITACHI HD684S “S" VERSION, ALTHOUGH THE I/O'S ARE DIFFERENT SEE PAGE 3 OF 3 FOR A DESCRIPTION OF THE ENHANCEMENTS TO THE HD684 5 “S" VERSION . THE PERFORMANCE

Contextual Info: GFC2100A GFC2100A GFC2100A 16-BIT MAGNITUDE COMPARATOR GENERAL DESCRIPTION: THE GFC2100A IS A MAGNITUDE COMPARATOR. IT COMPARES TWO 16-BIT BINARY NUMBERS AND YIELDS THREE OUTPUTS A>B, A<B, AND A-B . PIN DIAGRAM: GFC2100A - GATES USED - 170 •AREA USED - 183 GATE