HYMP512U64 Search Results

Contextual Info: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec., 2) Corrected a typo of SPD byte #41(tRC) Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

25TAC

Abstract: HYMP512U64
Contextual Info: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec. 2) Changed SPD typo #41 Apr. 2004 Corrected Pin assignment table & SPD typo (Byte #03, 14)

HYMP512U648-E3

Contextual Info: HYMP512U648-E3/C4 SERIAL PRESENCE DETECT E3 Function described 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58~61 62 63 Number of SPD Bytes Written during Module Production

CK2102

Abstract: DDR2-400 DDR2-533 HYMP512U64 MO-237 PC2-3200 PC2-4300 DDR2 DIMM 240 pin names
Contextual Info: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec. 2) Changed SPD typo #41 Apr. 2004 Corrected Pin assignment table & SPD typo (Byte #03, 14)

HYMP512U64BP8-C4

Abstract: HYMP512U64BP8-Y5 HYMP512U64BP8-S5 HYMP512U64BP8-S6 HYMP512U64BP8-E3 Hynix HYMP512U64BP8-Y5 hymp512u64 HYNIX HYMP512U64BP8C4 1E29
Contextual Info: SERIAL PRESENCE DETECT HYMP512U64BP8-E3 Function described HYMP512U64BP8-C4 HYMP512U64BP8-Y5 HYMP512U64BP8-S5 HYMP512U64BP8-S6 Function support HEX Function support HEX Function support HEX Function support HEX Function support HEX Number of SPD Bytes Written during Module Production

Contextual Info: HYMP512U64P8-E3/C4 SERIAL PRESENCE DETECT E3 Function described 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58~61 62 63 Number of SPD Bytes Written during Module Production

Contextual Info: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 DESCRIPTION Hynix HYMP512U64(72)8 series is unbuffered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 128Mx64(72) high-speed memory arrays. Hynix HYMP512U64(72)8 series

HYMP564U64A

Abstract: 64MBx64 IDD3P
Contextual Info: 240pin DDR2 SDRAM Unbuffered DIMMs based on 512 Mb A ver. This Hynix unbuffered Dual In-Line Memory Module DIMM series consists of 512Mb A ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 512Mb A ver. based DDR2 Unbuffered

Contextual Info: 240pin DDR2 SDRAM Unbuffered DIMMs based on 512 Mb B ver. This Hynix unbuffered Dual In-Line Memory Module DIMM series consists of 512Mb B ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 512Mb B ver. based DDR2 Unbuffered

Contextual Info: 240pin DDR2 SDRAM Unbuffered DIMMs based on 512 Mb 1st ver. This Hynix unbuffered Dual In-Line Memory Module DIMM series consists of 512Mb 1st ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 512Mb 1st ver. based DDR2 Unbuffered

Contextual Info: 240pin DDR2 SDRAM Unbuffered DIMMs based on 512 Mb B ver. This Hynix unbuffered Dual In-Line Memory Module DIMM series consists of 512Mb B ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 512Mb B ver. based

HYMP512S64CP8-Y5

Abstract: HYMP564S64CP6-Y5 H5TQ1G63BFR-H9C h5ps2g83afr-s6c H5PS1G63EFR-Y5C H5TQ1G83BFR-H9C HYMP564S64CP6-C4 HY5PS121621Cfp-y5 H5PS1G63EFR-S5C HY5PS12821CFP-Y5
Contextual Info: Q3’2009 Databook C omputing Memory DDR3 SDRAM : Component VDD DENSITY ORG. SPEED PART NUMBER PKG. FEATURE AVAIL. 1.5V 1Gb 256Mx4 DDR3 1333 H5TQ1G43AFP-H9C FBGA 78ball 8Bank, 1.5V, CL9,9-9-9 Now H5TQ1G43BFR-H9C FBGA(78ball) 8Bank, 1.5V, CL9,9-9-9 Now H5TQ1G43TFR-H9C

Contextual Info: 240pin DDR2 SDRAM Unbuffered DIMMs based on 512 Mb B ver. This Hynix unbuffered Dual In-Line Memory Module DIMM series consists of 512Mb B ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 512Mb B ver. based

HYMP532U646-E3

Abstract: HYMP512U648 HYMP532U64P6-E3 HYMP564U64P8 HYMP512U648-E3 hymp512u64
Contextual Info: 240pin DDR2 SDRAM Unbuffered DIMMs based on 512 Mb 1st ver. This Hynix unbuffered Dual In-Line Memory Module DIMM series consists of 512Mb 1st ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 512Mb 1st ver. based DDR2 Unbuffered

hymp512u72cp

Contextual Info: 240pin DDR2 SDRAM Unbuffered DIMMs based on 512 Mb C ver. This Hynix unbuffered Dual In-Line Memory Module DIMM series consists of 512Mb C ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 512Mb C ver. based

Contextual Info: 240pin DDR2 SDRAM Unbuffered DIMMs based on 512 Mb C ver. This Hynix unbuffered Dual In-Line Memory Module DIMM series consists of 512Mb C ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 512Mb C ver. based

hymp512u72cp

Abstract: hymp512u64cp8 HYMP564U64CP8
Contextual Info: 240pin DDR2 SDRAM Unbuffered DIMMs based on 512 Mb C ver. This Hynix unbuffered Dual In-Line Memory Module DIMM series consists of 512Mb C ver. DDR2 SDRAMs in Fine Ball Grid Array (FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 512Mb C ver. based