FX780 Search Results

XC3030-70PC84C

Abstract: EPM5128LC EP330PC-15 A1020 transistor A1010B-PL68C EPM5128GM EP330PC15 EP330PC XC3042-70PC84C A1020A-PL84C
Contextual Info: ULCt Cross-Reference Matra MHS Cross reference list of devices supported for ULC conversion is not exhaustiv as new devices are added regularly. Additional devices not shown in this list, may also be supported. MHS encourages you to contact your local TEMIC sales representative

TCA780

Abstract: TFK U 111 B TFK U 4614 B TFK S 186 P TFK U 217 B TFK BP w 41 n TFK BPW 41 N Tfk 880 TFK 148 TDSR 5150 G
Contextual Info: Industry Part Number 1N3245 1N3611GP 1N3612GP 1N3613GP 1N3614GP 1N3725 1N3957GP 1N4001GP 1N4002GP 1N4003GP 1N4004GP 1N4005GP 1N4006GP 1N4007GP 1N4245GP 1N4246GP 1N4247GP 1N4248GP 1N4249GP 1N4678.1N4717 1N4728A.1N4761A 1N4933GP 1N4934GP 1N4935GP 1N4936GP

intel ifx780

Abstract: R3051 R3057 3051M
Contextual Info: £DRAM Controller For 25MHz & 33MHz IDT R3051 Microprocessors ô \j/ _ ^ p M T R O IM nummary i lup 3R \M ca c lu . the liD R W t tan load a new page into ca th e in just 33ns a single wait slate at 2S or 33MII/. bus rales I . W rite cycles are RanHi'on's enhanced DRAM ( I ’D K W I I is t,u idea! iiic m so ia for

Contextual Info: 5EP -? intol ¡FX780 10 ns FLEXIogic FPGA FAMILY WITH SRAM OPTION Any CFB can be either 24V10 Logic or SRAM Block — Up to 80 Complex Macrocells — 128 x 10 SRAM Configuration — CFB Selectable 3.3V or 5V Outputs — Open-Drain Output Option High Performance FPGA Field

Contextual Info: 1 2 1993 intpl ÌFX780 10 ns FLEXIogic FPGA FAMILY WITH SRAM OPTION Any CFB can be either 24V10 Logic or SRAM Block — Up to 80 Complex Macrocells — 128 x 10 SRAM Configuration — CFB Selectable 3.3V or 5V Outputs — Open-Drain Output Option 24V10 Macrocell Features

NFX780-15

Abstract: KUFX780-10 KUFX780 intel FPGA tms 1035 128x10 intel PLD NFX780-10 FX780 PROTEUS-UPLC88
Contextual Info: in te i P R S O B M A I f f if ÌFX780 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA Field Programmable Gate Array — Deterministic 10 ns Pin-to-Pin Propagation Delays — 80 MHz System Clock Frequency Any CFB can be either 24V10 Logic or

Contextual Info: INTEL CORP MEMORY/PL] / böE D 4ß Sb l7 b GDflBDBfl 024 « I T L S A P m i M C B 0 M ( F [{ 3 R M ir 0 ® W In te l ) ÌFX8160 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA (Field Programmable Gate Array) — Deterministic 10 ns Pin-to-Pin

FX780

Abstract: IFX780
Contextual Info: in te h Application Brief AB-27 Using the ¡FX780 FPGA in Hybrid 3.3V/5V Systems Daniel E. Smith — Applications Engineering Programmable Logic Devices 1.0 Introduction The move from 5V to 3.3V supply voltages in the electronics industry is well under way. The

PROTEUS-UPLC88

Abstract: ifx780 KUFX780-10 NFX780-10 intel FPGA FX780 nfx780z10 fx780z KUFX780 intel ifx780
Contextual Info: in te i P R U O B M A lIR f ÌFX780 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA Field Programmable Gate Array — Deterministic 10 ns Pin-to-Pin Propagation Delays — 80 MHz System Clock Frequency 5,000 Equivalent Logic Gates or up to 10,240 Bits of SRAM

intel FPGA

Abstract: edram
Contextual Info: EDRAM Controller For 25MHz & 33MHz Intel Î960CA/CF Microprocessors ^ p M T R O N mmmary Ramtron'senhanced I R\M EDRAM) meniorv is ilir ideal letnorv fur high performance embedded control svstems. a No Wail Stales During Burst Read llil • Onlv One Wait State During Burst Read Miss and Burst Write Cycles

RJ12 socket

Abstract: Wiring Diagram rj12 RJ12 PINOUT vic68 RJ12 pin out DEFINE 825-000000-006 VIC068 software VMIVME-6016 M6016
Contextual Info: VMIVME-6016 16-CHANNEL INTELLIGENT ASYNCHRONOUS SERIAL CONTROLLER IASC PRODUCT MANUAL DOCUMENT NO. 500-006016-000 D Revised May 7, 1997 VME MICROSYSTEMS INTERNATIONAL CORPORATION 12090 SOUTH MEMORIAL PARKWAY HUNTSVILLE, AL 35803-3308 (205) 880-0444 FAX: (205) 882-0859

FX780

Abstract: intel FPGA KUFX780-10 NFX780-10 intel PLD intel ifx780 intel CMOS PLD
Contextual Info: [ P in te i iiy B M Ä f ÌFX780 10 ns FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA Field Programmable Gate Array — Deterministic 10 ns Pln-to-Pin Propagation Delays — 80 MHz System Clock Frequency Any CFB can be either 24V10 Logic or SRAM Block