EPM5192A Search Results

J-Lead, QFP ceramic

Abstract: PQFP 176 J-Lead
Contextual Info: EPM5192A EPLD □ Features □ □ Preliminary Information □ □ □ High-performance, second-generation MAX 5000 EPLD developed on an advanced 0.65-m icron CM OS EPROM process High-speed upgrade for existing EPM 5192 designs High-speed multi-LAB architecture

EPM5130

Abstract: EPM5064 MC3334 44 pin plcc socket program EPM5032 EPMS128 EPM5064-1
Contextual Info: MAX 5000 Programmable Logic Device Family Jan ua ry 1998. ver. 4 F e a tu r e s . Data S heet • ■ ■ ■ ■ ■ ■ ■ Advanced M ultiple A rray MatriX MAX® 5000 architecture combining speed and ease-of-use of PAL devices w ith the density of

programming manual EPLD EPS448

Abstract: Altera EPM5128 EPM7064-12 leap u1 EP-900910 PLE3-12a tcl tv circuit altera eplds EP610 "pin compatible" ALTERA MAX 5000
Contextual Info: Data Book TENTH ANNIVERSARY A Decade of Leadership A u g u s t 1993 Data Book August 1993 A-DB-0793-01 Altera, MAX, and M A X+PLUS are registered trademarks of Altera Corporation. The following, among others, are trademarks of Altera Corporation: AHDL, M AX+PLUS II, PL-ASAP2, PLDS-HPS, PLS-ADV, PLS-ES, PLS-FLEX8, PLS-FLEX8/H P, PLS-FLEX8/SN , PLS-HPS, PLS-STD, PLS-W S/H P,

16cudslr

Abstract: EP320I EPM7160 Transition vhdl code for lift controller EPM9560 ep330 INTEL 8-series NEC 9801 altera ep220 Silicon Laboratories
Contextual Info: M+2Book Page i Thursday, June 12, 1997 12:49 AM MAX+PLUS II Programmable Logic Development System Getting Started Altera Corporation 2610 Orchard Parkway San Jose, CA 95134-2020 408 894-7000 M+2TOC+ Page iii Monday, June 9, 1997 9:34 AM Contents Preface

programming epm7032

Abstract: Altera EP1800 altera EP600 22V10E EP610 "pin compatible" ALTERA MAX 5000 programming EP224 PLMJ7000-84 ep910 programmer EPX740
Contextual Info: Altera Programming Hardware Data Sheet March 1995, ver. 2 General Description Altera offers a variety of hardware to program and configure Altera devices. The following products are available: • ■ ■ ■ ■ Altera Stand-Alone Programmer Logic Programmer card

EPM5130

Abstract: J-Lead, EPM5128 APPLICATION NOTE ALTERA MAX 5000 MAX5000 macrocell Altera EPM5128 EPM5064-1
Contextual Info: MAX 5000 M M M & Programmable Logic Device Family , J a n u a r y 1 9 9 8 . v e r. 4 F e a tu re s . D a ta S h e e t m • ■ ■ Table 1. MAX5000 Device Features EPM5032 EPM5064 EPM5128 EPM5130 EPM5192 Usable gates 600 1,250 2,500 2,500 3,750 Macrocells

EPM5192

Abstract: EPM5192A J-Lead, QFP ceramic 100-Pin Package Pin-Out Diagram A1176 d1072 K66-1 EPM5192-1
Contextual Info: EPM5192 EPLD Features 11 • ■ ■ ■ Figure 20. EPM5192 Package Pin-Out Diagrams Package outlines not drawn to scale. See Tables 8 and 9 in this data sheet fo r pin-out information. Windows in ceramic packages only. 90005005 22 £ So 2 2 cu 5 ooaa o nnnnnnnnnnnnnnn

ep330

Abstract: CLASSIC EPLD FAMILY altera EP1810
Contextual Info: Operating Requirements for Altera Devices March 1995, ver. 6 Datasheet A ltera devices com bine unique program m able logic architectures w ith advanced C M O S processes to p rovid e exceptional perform ance and re lia b ility. To m aintain the highest possible perform ance and re lia b ility of

F1H16

Abstract: EPM 5192 epm5192 MSI MS-5 IC LM 384 gn
Contextual Info: EPM 5192 EPLD F e a tu re s • High-density, 192 macrocell, general-purpose M AX 5000 EPLD, easily integrating com plete logic boards into a single package High-speed m ulti-LAB architecture tpD as fast as 15 ns Counter frequencies up to 83.3 MHz Pipelined data rates up to 100 MHz

Date Code Formats Altera EPF10K

Abstract: ep22v10 5962-9061102XA 5962-8854901xa 8686401LA 5962-8686401LA lift controller in vhdl ALTERA PART MARKING EPM7160 EPX780 transistor b2020
Contextual Info: Introduction Contents March 1995 Introduction The PLD Advantages of Altera

ALTERA MAX 5000

Abstract: EPM5016 jlcc 32 R program EPM5032 epm5128a ALTERA MAX 5000 programming
Contextual Info: M A X 5 0 00/EPS464 Programmable Logic Device Family Data Sheet August 1993, ver. 1 □ Features □ □ □ □ □ □ □ □ □ Advanced M ultiple Array M atrix MAX 5000/E P S464 architecture com bining speed and ease-of-use of PAL devices with density of

EPM 5192

Abstract: EPM5192
Contextual Info: EPM5192 EPLD Features H igh-density, 192 macrocell, general-purpose MAX 5000 EPLD, easily integrating com plete logic boards into a single package High-speed multi-LAB architecture t PD as fast as 25 ns Counter frequencies up to 50 MHz Pipelined data rates up to 62.5 MHz

EPM5192

Contextual Info: EPM5192 EPLD Features H • ■ ■ ■ Figure 20. EPM5192 Package Pin-Out Diagrams Package outlines not drawn to scale. See Tables 8 and 9 in this data sheet fo r pin-out information. Windows in ceramic packages only. 0 D 3 z> D o û 5 2 2 § § § § § > iillo 0 § § § i° °

Contextual Info: ALTERA CORP bflE D • 05^5372 GGD33M2 11^ «A L T EPM 5192A EPLD Features □ □ P re lim in a ry Inform ation □ □ High-performance, second-generation MAX 5000 EPLD developed on an advanced 0.65-micron CMOS EPROM process High-speed upgrade for existing EPM5192 designs