DS2176 Search Results

Contextual Info: DALLAS SEMICONDUCTOR DS2176 T1 Receive Buffer FEATURES PIN ASSIGNMENT • Synchronizes loop-timed and system-timed T1 data streams s ìg h C 1 24 H VDD RMSYNC C 2 • Two-frame buffer depth; slips occur on frame bound­ aries • Output indicates when slip occurs

PS700

Contextual Info: PS700 PS700 Rev. B4 Silicon Errata The PS700 Rev. B4 parts you have received conform functionally to the Device Data Sheet DS21760F , except for the anomalies described below. Microchip does not intend to address the issues listed here in future revisions of the PS700 silicon. It is recommended that you replace the PS700 in existing

si24

Contextual Info: DS2176 F U LL DATA S H E E T A V A IL A B L E - C A L L 214-450-3836 DALLAS DS2176 T 1 R eceive Buffer s e m ic o n d u c to r PIN ASSIGNMENT FEATURES • Synchronizes loop-timed and system-timed T 1 data streams C C C C 3 22 4 21 AC 5 20 C CC DC SCH CLK C

DS2186

Abstract: DS2187 DS2176 DS2176N DS2176Q DS2180A 193s
Contextual Info: DS2176 DS2176 T1 Receive Buffer PIN ASSIGNMENT • Synchronizes loop–timed and system–timed T1 data 1 24 VDD 2 23 SCLKSEL RCLK 3 22 SYSCLK RSER 4 21 SSER A 5 20 SLIP B 6 19 SBIT8 C 7 18 SMSYNC D 8 17 SIGFRZ SCHCLK 9 16 SFSYNC SM0 10 15 ALN SM1 11 14 FMS

Contextual Info: DS2176 DALLAS SEMICONDUCTOR DS2176 T 1 Receive Buffer FEATURES PIN ASSIGNMENT • Synchronizes loop-timed and system-timed T1 data streams 1 24 □ VDD RMSYNC C 2 s ig h C 23 □ SCLKSEL r c lk C 22 □ SYSCLK • Two-frame buffer depth; slips occur on frame bound­

Contextual Info: r jA l 1 AQ sEsaicsDMDtiCfoii DS2176 T1 Receive Buffer PIN ASSIGNMENT FEATURES Synchronizes loop-timed and system-timed T1 data streams Two-frame buffer depth; slips occur on frame boundaries Output indicates when slip occurs Buffer may be recentered externally

Contextual Info: DALLAS DS2176 T 1 Receive Buffer s e m ic o n d u c to r FEATURES PIN ASSIGNMENT • Synchronizes lo o p -tim e d and syste m -tim ed T1 data stream s C 1 24 □ VDD RMSYNC C 2 23 □ SCLKSEL RCLK C 3 22 □ SYSCLK RSER C 4 21 □ SSER s ig h • T w o-fram e buffer depth; slips occur on frame bound­

Contextual Info: DALLAS SEMICONDUCTOR DS2176 T 1 Receive Buffer FEATURES PIN ASSIGNMENT • Synchronizes loop-timed and system-timed T 1 data streams s ig h C 1 24 □ VDD C 2 23 3 SCLKSEL rclkC 3 RMSYNC • Two-frame buffer depth; slips occur on frame bound­ aries 22 □ SYSCLK

pabx systems

Abstract: DS2176 DS2176N DS2176Q DS2180A DS2186 DS2187
Contextual Info: DS2176 DS2176 T1 Receive Buffer FEATURES PIN ASSIGNMENT • Synchronizes loop–timed and system–timed T1 data SIGH 1 24 VDD RMSYNC 2 23 SCLKSEL RCLK 3 22 SYSCLK RSER 4 21 SSER A 5 20 SLIP B 6 19 SBIT8 C 7 18 SMSYNC D 8 17 SIGFRZ SCHCLK 9 16 SFSYNC SM0 10

signalling and frame alignment in E1

Abstract: DS2176 DS2176N DS2176Q DS2180A DS2186 DC817 BC619
Contextual Info: DS 2176 DALLAS DS2176 T 1 Receive Buffer s e m ic o n d u c to r PIN ASSIGNMENT FEATURES • Synchronizes loop -tim e d and system -tim e d T1 data stream s 1 24 □ VDD RMSYNC C 2 s ig h C 23 □ SCLKSEL • T w o -fra m e buffer depth; slips occur on frame bound­

Contextual Info: Standard Product August 1992 LXP2176 T 1 Receive Buffer T he L X P2176 is one o f a fam ily o f L evel O ne T1 interface solutions and is com patible w ith the LXT300/301 T rans­ • D rop-in replacem ent for th e DS2176 ceiver, the L X P 2 180A Fram er/Form atter, and the L X P600/

Contextual Info: DS2176 FEATURES PIN CONNECTIONS • Synchronizes loop-tim ed and systemtim ed T1 data stream s • Two-frame buffer depth; slips occur on fram e boundaries • O utput indicates when slip occurs • B uffer may be recentered externally • Ideal for 1.544 to 2.048 MHz rate con­

PVD100

Contextual Info: DS2176 T1 Receive Buffer www.dalsemi.com PIN ASSIGNMENT SIGH RMSYN RCLK RSER A B C D SCHCLK SM0 SM1 1 2 3 4 5 6 7 8 9 10 11 12 VSS VDD SCKLSEL SYCLK SSER SLIP SBIT8 SMSYNC SIGFRZ SFSYNC ALN FMS 24 23 22 21 20 19 18 17 16 15 14 13 S/P 24-PIN 300 MIL DIP A B

DS2176

Abstract: DS2176N DS2176Q DS2180A
Contextual Info: DS2176 T1 Receive Buffer www.dalsemi.com PIN ASSIGNMENT § § § § § § § § § § § § § Synchronizes loop–timed and system–timed T1 data streams Two–frame buffer depth; slips occur on frame boundaries Output indicates when slip occurs Buffer may be recentered externally

Contextual Info: DS2176 DALLAS SEMICONDUCTOR DS2176 T 1 Receive Buffer PIN ASSIGNMENT FEATURES • Synchronizes loop-timed and system-timed T1 data streams U ghC 1 24 RMSYNCC 2 23 • Two-frame buffer depth; slips occur on frame bound­ aries • Output indicates when slip occurs

DS2176

Abstract: DS2176IND DS2176Q DS2180A
Contextual Info: DA L L A S S E M I C O N D U C T O R C O R P CHE D | Et.14130 GODSflflS 4 | Dallas Sem iconductor T-~i£-n-3i T 1 R e c e i ve B u ffe r FEATURES Synchronizes loop-timed and systemtimed T1 data streams Two-frame buffer depth; slips occur on frame boundaries

Contextual Info: DS2180A DALLAS SEMICONDUCTOR DS2180A T1 Transceiver FEATURES PIN ASSIG NM ENT • Single chip DS1 rate transceiver TMSYNC [ • Supports common framing standards - 12 frames/superframe “193S” - 24 frames/superframe “193E” 1 w 39 ] RLOS TCLK [ 3 TCHCLK [ 4

Contextual Info: DS2190-003 DS2190-003 DALLAS SEM ICONDUCTOR T1 NETWORK INTERFACE UNIT NIU PIN CONNECTIONS FEATURES • Modularized network interface for 1.544 Mbps T1 services • Network side connects directly to T1 line • Compatible with DS2180A Transceiver • Small size-approximately six square inchespermits integration onto line cards

Contextual Info: DS2190-003 DALLAS SEMICONDUCTOR DS2190-003 T1 Network Interface Unit NIU PIN ASSIGNMENT FEATURES • Modularized network interface for 1.544 Mbps T 1 ser­ vices • Network side connects directly to T1 line • Compatible with DS2180A or DS2141A T1 /ISDN Pri­

DS1425L-F5

Abstract: rtc ds1307 dallas ds2501 dallas ds2501 Datasheet dallas ds1280 DS2501 ds1642-150 DS1669 replacement ds2501 Datasheet DS1608S
Contextual Info: ORDERING INFORMATION DEVICE DS0621–SDK DS0630 DS1000 DS1000–IND DS1003 DS1004 DS1005 DS1007 DS1010 DS1012 DS1013 DS1020 DS1021 DS1033 DS1035 DS1040 PACKAGE TYPE Software Software 14–Pin DIP 8–Pin DIP 16–Pin SOIC 8–Pin SOIC 8–Pin DIP 8–Pin SOIC

F5 sot223

Abstract: DS18S20Z DS1270Y-70IND TSOC 6 socket ds1480 DS1321 DS1667S-010 DS2404S-001 DS2404S001 dallas ds1213c
Contextual Info: DS1233A 3.3V EconoReset www.maxim-ic.com FEATURES § § § § § § § § § § PIN ASSIGNMENT Automatically restarts microprocessor after power failure Monitors pushbutton for external override Internal circuitry debounces pushbutton switch Maintains reset for 350ms after VCC returns to

DS1425L-F5

Abstract: F5 sot223 TSOC 6 socket DS-1100 DS1267SN-100 DS1314DS DS275 8-Pin SOIC 150-mil DS1667S-010 DS1640 DS1238S5
Contextual Info: DS1233 5V EconoReset www.maxim-ic.com FEATURES § § § § § § § § § § PIN ASSIGNMENT Automatically restarts microprocessor after power failure Monitors pushbutton for external override Internal circuitry debounces pushbutton switch Maintains reset for 350ms after VCC returns to

AN793

Abstract: buck converter with dsPIC AN1025 MCP1601 MCP1612 MCP1700 TC1017 TC1303 DS00968 pic vfd
Contextual Info: AN1025 从 5.0V 电源转换成 3.0V 稳压输出 作者： Cliff Ellison Microchip Technology Inc. 简介 系统设计工程师面临着设计出具有更多功能的产品，同 时维持或降低成本的压力，因此需要考虑采用技术先进 的器件。为了生产出具更多功能和合理成本的集成电路

sr 4416

Abstract: 0X060 CTC 313 0X068 ntc c1-100 NTC 5e 2N 5060 526 PS700 DE20047 D 3141
Contextual Info: PS700 电池监控器 特性 引脚说明 • 可精确测量维护以及报告可再充电电池的所有重 要参数 • 支持锂电池组 （一节装和两节装）应用 • 内部集成16位A/D可实现精确电流测量，误差小于 ±0.5% 9&,2