DS2151 Search Results

44-PIN

Abstract: DS2151Q DS2151QN DS2153Q TTR62411 1S191 SLC-96 Mode Defined
Contextual Info: DS2151Q DS 2151Q D A L L A S s e m ic o n d u c to r FEATURES T 1 Single—Chip Transceiver PIN ASSIG NM ENT • C om plete D S 1/IS D N -P R I transceiver functionality Functional Blocks nnnnnnnnnnn • Line interface can handle both long and short haul trunks

Contextual Info: DS2151Q DALLAS SEM ICONDUCTOR DS2151Q T1 Single-Chip Transceiver PIN ASSIGNMENT FEATURES • Complete DS1/ISDN-PRI transceiver functionality Functional Blocks nnnnnnnnnnn • Line interface can handle both long and short haul trunks • 32-bit or 128-bit jitter attenuator

DS2141A

Abstract: DS2151
Contextual Info: DS2141A/DS2151 Application Note Programming, D4 Framing Applications June 22, 1994 Transmit Framing In D4 framing applications, the transmit side of the DS2141A and DS2151 can be set up to automatically insert both the Ft and the Fs framing pattern. To have the devices insert the Ft pattern, set the TCR1.6 bit to zero. To have the devices

DS2151

Abstract: DS2153
Contextual Info: DS2151/53 APPLICATION NOTE Programming, Initialization March 12, 1996 GENERAL INITIALIZATION FOR THE DS2151 AND DS2153 After power-up, when supplies and clocks have stabilized, internal registers must be initialized. It is a good idea to clear, set to 00H, ALL R/W registers. Certain registers have bits which control special test modes and features which

DS21352

Abstract: DS21354 DS2151 DS2152 DS2153 DS2154 DS2155 DS21552 DS21554 DS21X5Y
Contextual Info: COMMUNICATIONS CIRCUITS Aug 10, 2001 App Note 341: DS2151, DS2153 Device Identification Application Note 341 describes how to identify the device correctly by software. This application note provides the procedure that allows the software to identify the device or poll the device identification register to

DS2151QB

Contextual Info: DS2151Q T1 Single-Chip Transceiver www.maxim-ic.com PIN CONFIGURATION Complete DS1/ISDN-PRI Transceiver Functionality Line Interface Can Handle Both Long- and Short-Haul Trunks 32-Bit or 128-Bit Jitter Attenuator Generates DSX-1 and CSU Line Build-Outs Frames to D4, ESF, and SLC-96R Formats

T1X14

Contextual Info: DS2151Q DALLAS SEMICONDUCTOR FEATURES D S 2 1 5 1 Q T1 Single-Chip Transceiver PIN ASSIGNMENT • Com plete D S1/IS D N -P R I transceiver functionality • Line interface can handle both long and short haul trunks • 3 2 -b it or 12 8 -b it jitte r attenuator

AN303

Abstract: ADSP-2181 ADSP2181 APP303 DS2151 DS2153
Contextual Info: Maxim > App Notes > Communications Circuits Telecom Keywords: interface, non-multiplexed, port, SCTs, single chip transceivers May 01, 2001 APPLICATION NOTE 303 DS2151, DS2153 Interfacing to the ADSP-2181 Abstract: Application note 303 provides information on connecting the DS2151 and DS2153 single chip

AN323

Abstract: DS2154 isolation transformer abstract 470 resistor resistor 470Ohm APP323 DS2151 DS2152 DS2153 monitor
Contextual Info: Maxim > App Notes > TELECOM Keywords: T1, E1, line monitor, T1/E1, single chip transceivers, SCTs, DS2151, DS2152, DS2153, DS2154 May 08, 2001 APPLICATION NOTE 323 DS2151, DS2152, DS2153, DS2154 T1/E1 Line Monitor Abstract: The DS2151, DS2152, DS2153 and DS2154 single chip transceivers SCTs can be used in nonintrusive line monitor applications. Typical monitor ports are isolated from TIP and RING by 470 ohms (T1)

AN316

Abstract: APP316 DS2151 DS2153 PM7345 7345
Contextual Info: Maxim > App Notes > COMMUNICATIONS CIRCUITS TELECOM Keywords: PMC-Sierra, PM7345, Utopia, T1, E1, T1/E1, single chip transceiver, SCT May 08, 2001 APPLICATION NOTE 316 DS2151, DS2153 Interfacing to the PMC-Sierra PM7345 Abstract: This application note provides a logical diagram of the interface of the Dallas Semiconductor/Maxim

AN312

Abstract: APP312 DS2151 DS2153 PEB20320
Contextual Info: Maxim > App Notes > TELECOM Keywords: Siemens, PEB20320, DS1, T1, E1, T1/E1, SCT, single chip transceiver May 07, 2001 APPLICATION NOTE 312 DS2151, DS2153 Interfacing to the PEB20320 Abstract: Application Note 312 provides a logical diagram of the interface of the Dallas Semiconductor/Maxim

DS2141A

Abstract: DS2151
Contextual Info: COMMUNICATIONS CIRCUITS Application Note 464: Aug 10, 2001 App Note 339: DS2141A, DS2151 D4 Framing Applications Application note 339 discusses D4 framing applications, including transmit D4 framing and Yellow Alarm options for the DS2141A and DS2151 transceivers.

6 pin 2D 1002

Abstract: rs5 remote datasheet Rbl 69 2F 1 marking SR20 diode EGL A1 5.1 5 band equalizer analog devices marking d 7b CEPT-E1 ch7 mark
Contextual Info: DS2151Q DS2151Q T1 Single–Chip Transceiver FEATURES PIN ASSIGNMENT • Complete DS1/ISDN–PRI transceiver functionality can handle both long and short haul • 32–bit or 128–bit jitter attenuator • Generates DSX–1 and CSU line build outs • Frames to D4, ESF, and SLC–96R formats

TR54016

Abstract: DS21352 DS2141A DS2151 DS2152 DS2155 DS21552 ANSI T1.403
Contextual Info: Maxim > App Notes > TELECOM Keywords: framer, SCT, single chip transceiver, AT&T, TR54016, ANSI, T1.403, FDL, facility data link, PRM, performance report message, ESF May 11, 2001 APPLICATION NOTE 461 Programming and Controlling the FDL on DS2141A, DS2151

44-PIN

Abstract: DS2151Q DS2151QN DS2153Q TTR62411 6 pin 2D 1002 ring COUNTER
Contextual Info: DS2151Q DALLAS SEMICONDUCTOR FEATURES D S 2 15 1Q T1 Single-Chip Transceiver PIN ASSIG NM ENT • C om plete D S 1/IS D N -P R I transceiver functionality Functional Blocks nnnnnnnnnnn • Line interface can handle both long and short haul trunks • 3 2 -b it or 1 2 8 -b it jitte r attenuator

IC 92112

Abstract: 92112 92112 ic AN347 application notes DS2151 DS2152 DS2153 AN347 DS2153DK
Contextual Info: Maxim > App Notes > COMMUNICATIONS CIRCUITS May 15, 2001 Keywords: DS2151, DS2153, demo kits, T1, E1 APPLICATION NOTE 347 Converting the DS2151/DS2153 Demo Kits Abstract: The DS2151DK and DS2153DK are ordered and shipped for either T1 or E1 operation. However, the

TESO

Abstract: DS2151Q DS2152L RC24
Contextual Info: Application Note 349 DS2152L vs. DS2151Q INTRODUCTION This application note highlights the differences between the DS2152L and the DS2151Q T1 Single Chip Transceivers. The DS2152L is a superset of the DS2151Q. All of the original features of the DS2151Q have been retained and software created for the DS2151Q is transferable to the DS2152L with minimal

DS21354

Abstract: DS2141A DS2143 DS2151 DS2152 DS2153 DS2154 DS2155 DS21554 DS21Q41B
Contextual Info: Application Note 301 Legacy T1/E1 8MHz Backplane Operation www.maxim-ic.com INTRODUCTION This application note applies to the following products: T1 FRAMERS DS2141A DS21Q41B E1 FRAMERS DS2143 DS21Q43A T1 SCTs DS2151 DS2152 E1 SCTs DS2153 DS2154 This application note will discuss the requirements for multiplexing four PCM streams into one 8MHz system

RCr20

Abstract: cyclic redundancy check 61221 AN337 DS21352 DS2151 DS2152 DS2155 DS21552 61211
Contextual Info: Application Note 337 Implementation of ANSI T1.231 On Dallas Semiconductor T1 SCTs www.maxim-ic.com Overview The DS2151, DS2152, DS21352, DS21552 and DS2155 single-chip transceivers incorporate all the key performance indications that are required by ANSI T1.231-1997 originally dated 1993 , entitled “Digital

transistor 431 smd

Abstract: smd PULSE TRANSFORMER BT8510 DS2151Q DS2153Q DS2186 PM4341 PM6341 T7290 TEW5720
Contextual Info: CEPT/T1 TEW5720 Output Transformer TEW5720-1 is designed to be used as transmit transformer for: TEW5720 is designed to be used as a transmit transformer in the ISDN primary rate access network with the following devices: – Dallas DS2186 DS2151Q DS2153Q

i.431 T1

Abstract: DS2151Q DS2153Q DS2186 PM4341 T7290 TEW5301
Contextual Info: CEPT/T1 TEW5301 Output Transformer TEW5301 is designed and approved to be used as a transmit transformer in T1/CEPT applications with the following devices: Complies with ANSI T1.408 and CCITT I.431with regards to Longitudinal Balance. – Dallas DS2186 DS2151Q

hdlc

Abstract: DS2151 DS2153 MC68360 MC68MH360 QUICC32 DS21510
Contextual Info: DS2151/53 APPLICATION NOTE PCM Interface, INTERFACING TO THE MC68MH360 QUICC32 AUGUST 28, 1995 Interconnections between the DS2151 or DS2153 and the Motorola MC68MH360 QUICC32 are shown in Figure 1. The MC68MH360 can be configured as an HDLC controller implementing protocols such as LAPD for both D channel

DD CONVERTER marking code T92

Abstract: DS2151Q DS2151QN DS2153Q TR62411
Contextual Info: D S 2 15 1Q a D A L L A S DS2151Q T1 Single—Chip Transceiver s e m ic o n d u c to r FEATURES PIN ASSIGNM ENT • Complete DS1/ISDN-PRI transceiver functionality Functional Blocks • Line interface can handle both long and short haul trunks • 32-bit or 128-bit jitter attenuator

DS2151

Abstract: DS2153
Contextual Info: Application Note 341 DS2151, DS2153 Programming, Device Identification IDENTIFYING A DS2151 OR DS2153 Boards designed for T1 or E1 operation can simply have an installation option for either a DS2151 or a DS2153. The following procedure can be used to allow software to identify which device is installed then carry out