DS104 Search Results

Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 02.9, April 2014 iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features  Flexible Logic Architecture – Schmitt trigger inputs, to 200 mV typical hysteresis • Programmable pull-up mode

B952AS-1R1N

Abstract: B952AS-1R8N B952AS-2R7N DS104C2
Contextual Info: づ け Fixed Inductors for Surface Mounting 面実装用固定インダクタ DS104C2 Inductance Range: 1.1~120 H Recommended patterns DIMENSIONS／外形寸法図 3.6 推奨パターン図 5.4 10.7 Unit: mm (Unit: mm) FEATURES／特長 • • • •

"Delay Lines"

Abstract: 74F04 DS1035 DS1044 DS1044R
Contextual Info: DS1044 DS1044 4–in–1 High–Speed Silicon Delay Line FEATURES PIN ASSIGNMENT • All–silicon timing circuit IN1 1 14 VCC NC 2 13 NC IN2 3 12 OUT1 IN3 4 11 NC IN4 5 10 OUT2 NC 6 9 OUT3 GND 7 8 OUT4 • Four independent buffered delays • Initial delay tolerance ±1.5 ns

DS1425L-F5

Abstract: rtc ds1307 dallas ds2501 dallas ds2501 Datasheet dallas ds1280 DS2501 ds1642-150 DS1669 replacement ds2501 Datasheet DS1608S
Contextual Info: ORDERING INFORMATION DEVICE DS0621–SDK DS0630 DS1000 DS1000–IND DS1003 DS1004 DS1005 DS1007 DS1010 DS1012 DS1013 DS1020 DS1021 DS1033 DS1035 DS1040 PACKAGE TYPE Software Software 14–Pin DIP 8–Pin DIP 16–Pin SOIC 8–Pin SOIC 8–Pin DIP 8–Pin SOIC

14-PIN

Contextual Info: DS1044 DS1044 4 —¡n—1H igh-Speed Silicon Delay Line PIN ASSIGNMENT NC • Initial delay tolerance ±1.5 ns IN2 IN3 • Stable and precise over temperature and voltage IN4 • Leading and trailing edge precision preserves the input symmetry NC GND • Standard 14-pin DIP, 14-pin SOIC 150 mil

Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 02.5, August 2013 iCE40 LP/HX Family Data Sheet Introduction August 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device

Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 02.4, July 2013 iCE40 LP/HX Family Data Sheet Introduction July 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture

LXV8-PW40

Abstract: 4000K R/LXV8-PW40
Contextual Info: LUXEON H Easy to use LED on board solutions for directional applications with high voltage drivers Technical Datasheet DS104 LUXEON H High Voltage 100V and 200V LED Introduction LUXEON H delivers superior lumen density, color performance and reliability in a high voltage

B952AS-220M

Abstract: B952AS-1R1N B952AS-1R8N B952AS-2R7N DS104C2 B952AS-6R8N B952AS-100M
Contextual Info: Fixed Inductors for Surface Mounting づ け 面実装用 固定インダクタ DS104C2 Inductance Range: 1.1~120µH Recommended patterns DIMENSIONS／外形寸法図 推奨パターン図 6.0 4.8Max. 2.0 3.0 3.6 □ 10.4Max. 5.4 方向表示 Direction indication

DS104C2 equivalent

Contextual Info: Fixed Inductors for Surface Mounting 面実装用 固定インダクタ づ け TYPE DS104C2 【 DS104C2 】 DIMENSIONS / 外形寸法図 Unit : mm RECOMMENDED PATTERN / はんだ付け推奨パターン Unit : mm FEATURES / 特 長 4.8mm max. height and 10.4mm max square.

DS1047

Contextual Info: MachXO3L Family Data Sheet Advance DS1047 Version 00.2, February 2014 MachXO3L Family Data Sheet Introduction February 2014 Advance Data Sheet DS1047 Features  Solutions • • • • • • • • • • Smallest footprint, lowest power, high data

DS104LC

Abstract: B1179 B1179BS-15 b1179bs-330m
Contextual Info: Fixed Inductors for Surface Mounting 面実装用固定インダクタ DS104LC Recommended patterns Inductance Range: 1.0~100H 推奨パターン図 Unit: mm FEATURES (Unit: mm) 特長 •    10.4mm Max. square and 4.0mm Max. height. Magnetically shielded construction and low DC resistance.

BO-63

Contextual Info: DS1045 DALLAS SEMICONDUCTOR DS1045 4-Bit Dual Programmable Delay Line PIN ASSIGNMENT FEATURES • All-silicon time delay < o o [ 3 [ A1 [ A2 [ A3 [ GND [ 4 EA • Programmable via four input pins A0 • Programmable increments of 3 to 5 ns with a mini­ mum of 9 ns and a maximum of 84 ns

74LS-type

Contextual Info: DS1045 DS1045 4-Bit Dual Programmable Delay Line PIN ASSIGNMENT FEATURES • All-silicon time delay [_ IN • Programmable via four input pins L J o o > • Two programmable outputs from a single input pro­ duce output-to-output delays between 9 and 84 ns

74F04

Abstract: DS1045 DS1045-3 DS1045-4 DS1045-5 DS1045S J-STD-020A
Contextual Info: DS1045 4-Bit Dual Programmable Delay Line www.dalsemi.com FEATURES All-silicon time delay Two programmable outputs from a single input produce output-to-output delays between 9 and 84 ns depending on device type Programmable via four input pins Programmable increments of 3 to 5 ns with a

74F04

Abstract: DS1035 DS1044 DS1044R DIP SWITCH EDGE
Contextual Info: DS1044 DS1044 4–in–1 High–Speed Silicon Delay Line FEATURES PIN ASSIGNMENT • All–silicon timing circuit IN1 1 14 VCC NC 2 13 NC IN2 3 12 OUT1 IN3 4 11 NC IN4 5 10 OUT2 NC 6 9 OUT3 GND 7 8 OUT4 • Four independent buffered delays • Initial delay tolerance ±1.5 ns

Contextual Info: Ferrite Inductors フェライトインダクタ DS104LC Recommended patterns Inductance Range: 1.0~100H 推奨パターン図 Unit: mm (Unit: mm) FEATURES •     特長 10.4mm Max. square and 4.0mm Max. height. Magnetically shielded construction and low DC resistance.

Contextual Info: Ferrite Inductors フェライトインダクタ DS104LC Recommended patterns Inductance Range: 1.0~100H 推奨パターン図 Unit: mm FEATURES •     (Unit: mm) 特長 10.4mm Max. square and 4.0mm Max. height. Magnetically shielded construction and low DC resistance.

A 68064

Abstract: DELTA 807 DS1045-3 DS1045-4 DS1045-5 74LS AN421 APP421 DS1045 DS1045-2
Contextual Info: Maxim > App Notes > OSCILLATORS/DELAY LINES/TIMERS/COUNTERS Keywords: DS1045, ds1045 characterization, device characteristics, programmable delay line, delay lines Mar 29, 2001 APPLICATION NOTE 421 Device Characteristics of the DS1045 Dual 4-Bit Programmable

"pulse generator"

Abstract: Pulse generator circuit Q 371 Transistor three phase pulse generator 74LS DS1040 DS1040-100 DS1040-150 DS1040-200 DS1040-250
Contextual Info: DS1040 DS1040 Programmable One-Shot Pulse Generator FEATURES PIN ASSIGNMENT • All-silicon pulse width generator • Five programmable widths • Equal and unequal increments available • Pulse widths from 5 ns to 500 ns 1 8 VCC 2 7 P0 OUT 3 6 P1 GND 4 5

DS1666

Abstract: DS2011D 74F04 DS1000 DS1045 DS1045-2 DS1045-3 DS1045-4 DS1045-5 DS1045S
Contextual Info: DALLAS SEMICONDUCTOR DS1045 4 -B it Dual Program m able Delay Line FEATURES PIN ASSIGNMENT • A ll-silicon tim e delay 16 ] o o > IN [ I_ I • Two program m able outputs from a single input pro­ duce o u tp u t-to -o u tp u t delays between 9 and 84 ns

37143

Contextual Info: DS1044 DALLAS SEMICONDUCTOR DS1044 4—in— 1 High-Speed Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon timing circuit NC • Initial delay tolerance ±1.5 ns IN2 IN3 • Stable and precise over temperature and voltage IN4 • Leading and trailing edge precision preserves the

56-G2008-001C

Contextual Info: DS1044 DS1044 4–in–1 High–Speed Silicon Delay Line FEATURES PIN ASSIGNMENT • All–silicon timing circuit IN1 1 14 VCC NC 2 13 NC IN2 3 12 OUT1 IN3 4 11 NC IN4 5 10 OUT2 NC 6 9 OUT3 GND 7 8 OUT4 • Four independent buffered delays • Initial delay tolerance ±1.5 ns

Contextual Info: DS1040 DS1040 Programmable One-Shot Pulse Generator DALLAS SEMICONDUCTOR PIN ASSIGNMENT FEATURES • All-silicon pulse width generator C 1 8 öütH 2 7 : P0 OUTC 3 6 : P1 gndQ 4 5 : P2 IN • Five programmable widths • Equal and unequal increments available