DS101 Search Results

Contextual Info: DS1012 DS1012 2-in-1 Sub-Miniature Silicon Delay Line with Logic DALLAS SEMICONDUCTOR FEATURES PIN ASSIGNMENT • All-silicon tim e delay • 5 3 |iW m ax. C M O S quiescent m ode 8 H vcc 7 n 6 • Surface mount 8-pin m ini-SO IC and standard 8-pin D IP 5

Contextual Info: DS1012 DS1012 2-in-1 Sub-Miniature Silicon Delay Line with Logic DALLAS SEMICONDUCTOR FEATURES PIN ASSIGNMENT • All-silicon time delay • 53 jiW max. CMOS quiescent mode • Surface mount 8-pin mini-SOIC and standard 8-pin DIP 1N1 £ 1 O UT3C 2 OUT1 Q 3

DS1425L-F5

Abstract: rtc ds1307 dallas ds2501 dallas ds2501 Datasheet dallas ds1280 DS2501 ds1642-150 DS1669 replacement ds2501 Datasheet DS1608S
Contextual Info: ORDERING INFORMATION DEVICE DS0621–SDK DS0630 DS1000 DS1000–IND DS1003 DS1004 DS1005 DS1007 DS1010 DS1012 DS1013 DS1020 DS1021 DS1033 DS1035 DS1040 PACKAGE TYPE Software Software 14–Pin DIP 8–Pin DIP 16–Pin SOIC 8–Pin SOIC 8–Pin DIP 8–Pin SOIC

74FO4

Abstract: ds1010-100 74LS DS1010 DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80
Contextual Info: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile

Contextual Info: ispPAC-POWR1220AT8 In-System Programmable Power Supply Monitoring, Sequencing and Margining Controller September 2013 Data Sheet DS1015 Features Application Block Diagram  Monitor, Control, and Margin Multiple Power Supplies Primary Supply • Simultaneously monitors up to 12 power 

Contextual Info: ispPAC-POWR6AT6 In-System Programmable Power Supply Monitoring and Margining Controller September 2013 Data Sheet DS1016 Application Block Diagram Features • Power Supply Margin and Trim Functions Trim and margin up to six power supplies Dynamic voltage control through I2C

DS102

Abstract: DS1640
Contextual Info: DS1012 DALLAS SEMICONDUCTOR FEATURES 2-in-1 Sub-M iniature Silicon Delay Line with Logic PIN ASSIGNMENT • A ll-s ilic o n tim e d e la y • 5 3 n W m ax. C M O S q u ie s c e n t m o de • S u rfa c e m o u n t 8-p in m in i-S O IC a n d s ta n d a rd 8-pin

DS101

Abstract: LM-80 lumileds Luxeon M ellipse MacAdam ellipse definition LXA7-PW50
Contextual Info: LUXEON R Freedom From Binning Hot Tested Superior Quality of Light Technical Datasheet DS101 LUXEON R Freedom From Binning Introduction LUXEON® R brings Illumination Grade LED light sources to outdoor and industrial lighting applications and makes it easier than ever to design LED solutions and bring them to market. With hot testing,

TN1005

Abstract: la4128v pt77
Contextual Info: LA-ispMACH 4000V/Z Automotive Family 3.3V/1.8V In-System Programmable SuperFAST TM High Density PLDs March 2007 Data Sheet DS1017 Features • 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI interfaces • Hot-socketing • Open-drain capability • Input pull-up, pull-down or bus-keeper

1220AT8

Abstract: DS1015
Contextual Info: ispPAC-POWR1220AT8 In-System Programmable Power Supply Monitoring, Sequencing and Margining Controller October 2006 Data Sheet DS1015 Features Application Block Diagram • Monitor, Control, and Margin Multiple Power Supplies Primary Supply • Simultaneously monitors up to 12 power

YDS1012

Abstract: D37D4
Contextual Info: DS1012 -in-1 Sub-Miniature Silicon Delay Line with Logic DALLAS SEMICONDUCTOR PIN ASSIGNMENT FEATURES • A ll-s ilic o n tim e d e la y IN 1 • 53 n W m ax. C M O S q u ie s c e n t m ode [I v cc OUT3 L OUT 1 Q • S u rfa ce m o unt 8-pin m in i-S O IC and sta n d a rd 8-pin

Contextual Info: D S 1013 DALLAS SEMICONDUCTOR DS1013 3-in-1 Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 3 independent buffered delays • Delay tolerance ±2ns for -10 through -60 C1 14 Vcc !N 1 Q 1 16 NC 2 13 ] NC NC C 2 15 H NC 3 12 " ] OUT 1

Contextual Info: DS1010 DALLAS SEMICONDUCTOR DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • Delays are stable and precise -14 'TZ? r 1 NC P 2 ini • 10 taps equally spaced TAP 2 C 3 TAP 4 p • Leading and trailing edge accuracy 5

DS1017

Abstract: 4032V LA4064V-75TN44E ispMACH 4A Family AEC-Q100 PT77 c6 G1105 LA4032ZC-75TN48E D5371 d4361
Contextual Info: LA-ispMACH 4000V/Z Automotive Family 3.3V/1.8V In-System Programmable SuperFAST TM High Density PLDs July 2008 Data Sheet DS1017 Features • 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI interfaces • Hot-socketing • Open-drain capability • Input pull-up, pull-down or bus-keeper

MEC220

Abstract: MEC225 rechargeable battery DOD MAX17710 MEC202 IPS-EVAL-EH-01 MEC201
Contextual Info: THINERGY MEC220 Solid-State, Flexible, Rechargeable Thin-Film Micro-Energy Cell DS1013 v1.1 Preliminary Product Data Sheet Features • • • • • • • • • Thin Form Factor – 170 µm Thick Capacity options up to 400 µAh All Solid-State Construction

4032V

Abstract: AEC-Q100 DS1017 D5371
Contextual Info: LA-ispMACH 4000V/Z Automotive Family 3.3V/1.8V In-System Programmable SuperFAST TM High Density PLDs May 2009 Data Sheet DS1017 Features • 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI interfaces • Hot-socketing • Open-drain capability • Input pull-up, pull-down or bus-keeper

DS1010

Abstract: 74LS DS1010-100 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S dip switch data
Contextual Info: DS 1010 DALLAS DS1010 10-Tap Silicon Delay Line s e m ic o n d u c t o r FEATURES PIN ASSIGNMENT • All-silicon tim e delay ini r 1 14 V cc NO 2 13 TAP 1 TAP 2 [_ 3 12 TAP 3 4 11 TAP 5 TAP 6 \_ 5 10 TAP 7 TAP 4 6 9 TAP 9 TAP 6 • 10 taps equally spaced • Delays are stable and precise

DS1010-500

Abstract: 56-G4009-001B 74FO4 DS1010-125
Contextual Info: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile

Dallas 1012 D4

Contextual Info: D S 1012 DS1012 DALLAS SEMICONDUCTOR FEATURES 2-in-1 Sub-M iniature Silicon Delay Line with Logic PIN ASSIGNMENT • All-silicon time delay IN1 • 53 |uW max. CMOS quiescent m ode OUT3 E 1 E 2 OUT1 □ • Surface mount 8-pin m ini-SO IC and standard 8-pin

DS1014

Abstract: POWR1014A 1014a DS-1014
Contextual Info: ispPAC-POWR1014/A In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller April 2007 Data Sheet DS1014 Features Application Block Diagram • Monitor and Control Multiple Power Supplies Primary Supply • Simultaneously monitors up to 10 power

Contextual Info: LA-ispPAC-POWR1014/A Automotive Family In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller September 2013 Data Sheet DS1018 Features Application Block Diagram  Monitor and Control Multiple Power Supplies • Simultaneously monitors up to 10 power 

74ls gate symbols

Abstract: 74FO4 pin diagram of 74LS "Delay Lines" 74ls series 74LS SERIES cmos logic data DS1010-60 74LS series datasheet 74ls series logic DS1010-200
Contextual Info: DS1010 DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN1 1 14 VCC NC 2 13 TAP 1 IN 1 16 VCC TAP 2 3 12 TAP 3 NC 2 15 NC • Leading and trailing edge accuracy TAP 4 4 11 NC TAP 2 3 14 TAP 5 TAP 1 • Delay tolerance ±5% or ±2 ns, whichever is greater

POWR1014

Abstract: CMOS 4002 heart rate monitor using microcontroller POWR1014A DS1018 GLB3 867 905 352 airbag control unit in4 733 a ISPPAC-POWR1014-01TN48E
Contextual Info: LA-ispPAC-POWR1014/A Automotive Family In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller June 2008 Data Sheet DS1018 Features Application Block Diagram • Monitor and Control Multiple Power Supplies Primary Supply

Contextual Info: DS 1010 DS1010 DALLAS 10 s e m ic o n d u c t o r ~T a P Silicon D elay Line PIN ASSIGNMENT FEATURES • All-silicon time delay IN1 £ 1 • 10 taps equally spaced KOI 14 ] Vcc NC[ 2 13 ] TAP 1 in C 1 • Delays are stable and precise TAP 2 ^ 3 12 ] TAP 3