DS031 Search Results

DS0319

Contextual Info: FEA TU R ES & • 7 0 - 1000 MHz ■ CMOS Driver ■ 60 dB Isolation XFER MODEL NO. DS0319 PIN Diode Transfer Switch ■ 1.3 dB Insertion Loss ■ Low Transients ■ 18 Pin DIP RF4 P A R T ID E N T IF IC A T IO N - 1.00 - .20 .20 .018 D IA L E A D

LVDSEXT-25

Abstract: 16x1D LVPECL33 16X1S LVDS-25 LVDS-33 LVDSEXT25 LVDCI18 LVDCI25 LVDS25
Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-2 v1.9 November 29, 2001 Advance Product Specification Detailed Description Input/Output Blocks (IOBs) Table 1: Supported Single-Ended I/O Standards Virtex-II I/O blocks (IOBs) are provided in groups of two or

XC2V1000 Pin-out

Abstract: Virtex-II MAKING A10 BGA matrix m21 IEEE1532 XC2V1000 XC2V1500 XC2V250 XC2V40 XC2V500
Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.7 October 2, 2001 Advance Product Specification Summary of Virtex -II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates

wireless encrypt

Abstract: BF957
Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031 v1.1 December 6, 2000 Advance Product Specification Summary of Virtex -II Features • • Industry First Platform FPGA solution IP-Immersion architecture - Densities from 40K to 10M system gates

XC2V1500

Abstract: XC2V80 XC2V1000 XC2V2000 XC2V250 XC2V40 XC2V500 lightning event counter AF124 XC2V4000
Contextual Info: Virtex -II Platform FPGAs: Introduction and Overview R DS031-1 v1.9 September 26, 2002 Advance Product Specification Summary of Virtex-II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates

BG728

Abstract: CS144 FG256 FG676 xc2v1000 AE38 65B11 AF124 J377 Model 435 load cell
Contextual Info: Virtex -II Platform FPGAs: Complete Data Sheet R DS031 October 14, 2003 Product Specification This document includes all four modules of the Virtex-II Platform FPGA data sheet. Module 1: Introduction and Overview Module 3: DC and Switching Characteristics

Virtex-II

Abstract: XAPP623 XC2V6000-ff1152 LVPECL25 XC2V80 XC2V6000 XC2V1000 XC2V1500 XC2V2000 XC2V250
Contextual Info: 38 Virtex -II Platform FPGAs: DC and Switching Characteristics R DS031-3 v3.1 October 14, 2003 Product Specification Virtex-II Electrical Characteristics Virtex-II devices are provided in -6, -5, and -4 speed grades, with -6 having the highest performance.

GPS SAW filter

Abstract: marking rj3
Contextual Info: Flexibility & Innovation …. DS0315_03 08.08.02 DATA S HEET TSF1575-03 1575.42 MHZ GPS SAW FILTER PRODUCT SPECIFICATION PACKAGE 3X3 MM SMD PRODUCT F EATURES : Ø LOW LOSS Ø HIGH R EJECTIONS Ø SMALL SMD PACKAGE T EMEX S.A.W. CONTACT : PUITS -GODET 8, 2000 NEUCHÂTEL

tekelec TEMEX 102

Abstract: Tekelec Temex DS0317
Contextual Info: Flexibility & Innovation …. DS0317_03 2/05/02 DATA S HEET TSF1008-02 1008 MHZ CATV IF SAW FILTER FINAL SPECIFICATION PACKAGE 3.8X3.8 MM SMD C PRODUCT F EATURES : Ø LOW LOSS D B E A F 3.8 mm Ø HIGH R EJECTIONS Ø SMALL SMD PACKAGE CONTACT : A F B E C D

Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-3 v1.5 April 23, 2001 Advance Product Specification Virtex -II Electrical Characteristics Virtex-II devices are provided in -4, -5, and -6 speed grades, with -6 having the highest performance. commercial device). However, only selected speed grades

Contextual Info: F E AT U R E S MODEL NO. DS031 9 7 0 - 1 00 0 MHz CMOS Driver 60 dB Isolation 1.3 dB Insertion Loss Low Transients 18 Pin DIP XFER P IN Dio d e Tra n sf e r S witch RF2 RF4 9 10 PART IDENTIFICATION 1.00 .20 .20 .018±.002 DIA 18 PLACES .800 .100 TYP 1 9 18

DS0319

Abstract: DIP SWITCH
Contextual Info: MODEL NUMBER DS0319 FEATURES • 70 - 1000 MHz • CMOS Driver • 60 dB Isolation PIN Diode Transfer Switch • 1.3 dB Insertion Loss • Low Transients • 18 Pin DIP XFER DAICO Industries 310.507.3242 • FAX 310.507.5701 • www.daico.com 175

IO-L93N

Abstract: XC2V2000 XC2V10000
Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.3 January 25, 2001 Advance Product Specification Summary of Virtex -II Features • • • • • • • • Industry First Platform FPGA Solution IP-Immersion Architecture - Densities from 40K to 10M system gates

XC2V1000 Pin-out

Abstract: Virtex-II Field-Programmable Gate Arrays XC2V80 IEEE1532 XC2V1000 XC2V1500 XC2V250 XC2V40 XC2V500
Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.7 October 2, 2001 Advance Product Specification Summary of Virtex -II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates

XC2V1500

Abstract: FG256 FG676 BG728 CS144 AL205 LVDCI25 661129 j337 wireless encrypt
Contextual Info: Virtex-II Platform FPGAs: Complete Data Sheet R DS031 March 29, 2004 Product Specification This document includes all four modules of the Virtex-II Platform FPGA data sheet. Module 1: Introduction and Overview Module 3: DC and Switching Characteristics

digital FIR Filter verilog code

Abstract: XC2V6000 XC2V1000 XC2V1500 XC2V2000 XC2V250 XC2V40 XC2V500 XC2V80 K217
Contextual Info: Virtex -II Platform FPGAs: Introduction and Overview R DS031-1 v1.9 September 26, 2002 Advance Product Specification Summary of Virtex-II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates

16x1D

Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-2 v1.3 January 25, 2001 Advance Product Specification Detailed Description Input/Output Blocks (IOBs) Virtex-II I/O blocks (IOBs) are provided in groups of two or four on the perimeter of each device.

Contextual Info: FEATURES • 70-1000 MHz ■ CMOS Driver ■ 60 dB Isolation ■ 1.3 dB Insertion Loss ■ Low Transients ■ 18 Pin DIP MODEL NO. DS0319 è PIN Diode Transfer Switch RF2 XFER RF4 P A R T IDENTIFICATION 1.00 .20 1 t .20 T rnmn .018 DIA LEAD 2 3 4 6 7 8 11 12131516 17

fgg 484

Abstract: FGG676 MAKING A10 BGA R 2.8 no pinout 4 testbench verilog ram 16 x 4 vhdl code for carry select adder using ROM XC2V3000 abe 442 AM3 Processor Functional Data Sheet circuit for conventional inverter for the BGG system
Contextual Info: 1 Virtex-II Platform FPGAs: Complete Data Sheet R DS031 v3.3 June 24, 2004 Product Specification Module 1: Introduction and Overview Module 3: DC and Switching Characteristics DS031-1 (v3.3) June 24, 2004 7 pages DS031-3 (v3.3) June 24, 2004 42 pages •

GPS SAW filter

Abstract: TSF1575-03
Contextual Info: Flexibility & Innovation …. DS0315_02 14.05.02 DATA S HEET TSF1575-03 1575.42 MHZ GPS SAW FILTER PRELIMINARY SPECIFICATION PACKAGE 3X3 MM SMD PRODUCT F EATURES : Ø LOW LOSS Ø HIGH R EJECTIONS Ø SMALL SMD PACKAGE T EMEX S.A.W. CONTACT : PUITS -GODET 8,

Field-Programmable Gate Arrays

Abstract: XC2V80 XC2V1000 Pin-out IEEE1532 XC2V1000 XC2V1500 XC2V250 XC2V40 XC2V500 8 bit multiplier VERILOG
Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.5 April 2, 2001 Advance Product Specification Summary of Virtex -II Features • • • • • • • • Industry First Platform FPGA Solution IP-Immersion Architecture - Densities from 40K to 10M system gates

XC2V80

Abstract: XC2V1500 XC2V2000 XC2V250 XC2V40 XC2V500 XC2V1000 CLK27 AF124 XC2V4000
Contextual Info: Virtex -II Platform FPGAs: Introduction and Overview R DS031-1 v1.9 September 26, 2002 Advance Product Specification Summary of Virtex-II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates

XC2V1000

Abstract: XC2V3000 SEU DS031-2 xilinx XC2V3000 READBACK AF124 XC2V8000 XC2V80 XC2V1500 XC2V2000 XC2V3000
Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.8 July 16, 2002 Advance Product Specification Summary of VirtexTM-II Features - • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates - 420 MHz internal clock speed (Advance Data)

af276

Abstract: XC2V3000 XC2V1000 af306 M33 TRANSISTOR BF957 XC2V2000-5 CS144 FF1152 FG256
Contextual Info: Virtex-II 1.5V Field-Programmable Gate Arrays Pinout Information R DS031-4 v1.6 November 7, 2001 Advance Product Specification This document provides Virtex -II Device/Package Combinations and Maximum I/Os Available and Virtex-II Pin Definitions, followed by pinout tables for the following packages: