DD0Q40 Search Results
DD0Q40 Datasheets Context Search
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Contextual Info: AVG Semiconductors DDiT Technical Data DV74HCT112 Available Q2, 1995 DV74HC112 DV74HCT112 Dual J-K Flip-Flop with Set and Reset This device identical in pinout to the LS112. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs. |
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DV74HCT112 DV74HC112 DV74HCT112 LS112. AVG-003 AVG-004 1-800-AVG-SEMI DC74HC112, | |
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Contextual Info: □2 7610240 RECTRON ELECTRONIC DE I 7L1D240 □DD0Q40 1 SURFACE MOUNT DEVICES FOR HYBRID APPLICATIONS G LASS PASSIVA TED SILICO N CHIPS Vpk @ TA *FM <Sur9e 'r fiAdc O lo Maximum Forward Maximum Reverse Peak Surge Current Current @8.3ms ; @ P R V Voltage |
OCR Scan |
7L1D240 DD0Q40 FGD101 RT805 RT810 |