CTSLVEL16VR Search Results
CTSLVEL16VR Datasheets (2)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| CTSLVEL16VRNLG |
|
Interface - Signal Buffers, Repeaters, Splitters, Integrated Circuits (ICs), LVPECL OSC GAIN STAGE & BUFFER | Original | 11 | |||
| CTSLVEL16VRNNG |
|
Interface - Signal Buffers, Repeaters, Splitters, Integrated Circuits (ICs), LVPECL OSC GAIN STAGE & BUFFER | Original | 11 |
CTSLVEL16VR Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
|
Contextual Info: CTSLVEL16VT PECL/ECL Oscillator Gain Stage & Buffer with Selectable Enable MLP8 Block Diagram Features Minimizes External Components High Bandwidth for 1GHz Similar Operation as CTSLVEL16VR Except in Disabled Condition QHG is High -147 dBc/Hz Typical Noise Floor |
Original |
ctslvel16vtctslvel16vrctslvel16vtnngreva1113 | |
|
Contextual Info: CTSLVEL16VR PECL/ECL Oscillator Gain Stage & Buffer with Selectable Enable MLP8, MLP16 Features Block Diagram Minimizes External Components Selectable Enable Polarity and Threshold CMOS or PECL High Bandwidth for 1GHz Similar Operation as CTS100EL16 |
Original |
ctslvel16vrmlp16cts100el16ctslvel16vrnng+2 | |
marking+3610Contextual Info: CTSLVEL16VV Dual Frequency PECL/ECL Oscillator Gain Stage & Buffer with Enable MLP16 Features Block Diagram Minimizes External Components Similar Operation as CTSLVEL16VR except with Selectable Data Input Pairs High Bandwidth for 1GHz -147 dBc/Hz Typical Noise Floor |
Original |
ctslvel16vvmlp16ctslvel16vrctslvel16+3 | |
|
Contextual Info: CTSLVEL16VR PECL/ECL Oscillator Gain Stage & Buffer with Selectable Enable MLP8, MLP16 Features Block Diagram Minimizes External Components Selectable Enable Polarity and Threshold CMOS or PECL High Bandwidth for 1GHz Similar Operation as CTS100EL16 |
Original |
ctslvel16vrmlp16cts100el16ctslvel16vrnng+3 |