C1995 Search Results

LM709 equivalent

Abstract: square root extractor LM7104 square root extractor using log antilog LM101 LM102 LM709 LM101 disadvantages square root extractor application LM709 Widlar LM101
Contextual Info: The Monolithic Op Amp Monolithic Op Amp Universal Linear Component National Semiconductor Application Note 4 April 1968 Robert J Widlar Apartado Postal 541 Puerto Vallarta Jalisco Mexico C1995 National Semiconductor Corporation TL H 7357 TL H 7357 – 1 Figure 1 Free-running multivibrator

LM308 Op Amp IC

Abstract: ic lm741 national semiconductor LB-22 balancing resistors IC lm741 ic LM725 LM741 equivalent C1995 LM121 LM308
Contextual Info: C1995 National Semiconductor Corporation TL H 8728 results ensure that the gain fixing resistors are of the same material or have tracking temperature coefficients It is appropriate to mention offset balancing as this can have a large effect on drift Theoretically the drift of a transistor

schematic diagram of seagate hard disk pcb

Abstract: seagate pcb schematic flat ribbon cable essen M2FM se442 dp8463 dp8465 smd cookbook Fujitsu Silicon Darlington Transistor Array SASI
Contextual Info: National Semiconductor Application Note 413 James Cecil Ramachandran Gopalan William Llewellyn Shakeel Masood Pat Tucci Larry Wakeman January 1986 CHAPTER 1 DISK DRIVE TECHNOLOGY 1 0 INTRODUCTION DRIVES WINCHESTER C1995 National Semiconductor Corporation TL F 8663

diagrams of 16450 UART

Abstract: RRD-B30M75 SNLS378B
Contextual Info: PC16550D PC16550D Universal Asynchronous Receiver/Transmitter with FIFOs† Literature Number: SNLS378B PC16550D Universal Asynchronous Receiver Transmitter with FIFOs General Description Features The PC16550D is an improved version of the original 16450 Universal Asynchronous Receiver Transmitter UART

DP8392CN

Abstract: ECL 802 11085 LT6003 valor lt6003
Contextual Info: DP8392C,DP8392C-1 DP8392C DP8392C-1 CTI Coaxial Transceiver Interface Literature Number: SNLS078A DP8392C DP8392C-1 CTI Coaxial Transceiver Interface General Description Features The DP8392C Coaxial Transceiver Interface CTI is a coaxial cable line driver receiver for Ethernet Thin Ethernet

DP8570A

Contextual Info: DP8570A DP8570A Timer Clock Peripheral TCP Literature Number: SNAS557 DP8570A Timer Clock Peripheral (TCP) General Description The DP8570A is intended for use in microprocessor based systems where information is required for multi-tasking data logging or general time of day date information This device

Contextual Info: DM5438,DM7438 DM5438 DM7438 Quad 2-Input NAND Buffers with Open-Collector Outputs Literature Number: SNOS255A DM5438 DM7438 Quad 2-Input NAND Buffers with Open-Collector Outputs General Description Pull-Up Resistor Equations RMAX e VCC Min b VOH N1 (IOH) a N2 (IIH)

calculator chip

Contextual Info: DS8973 DS8973 9-Digit LED Driver Literature Number: SNOSBN5A DS8973 9-Digit LED Driver General Description The DS8973 is a 9-digit driver designed to operate from 3-cell battery supplies Each driver will sink 100 mA to less than 0 7V when driven by only 0 1 mA Each input is blocked

6506-1

Abstract: DM7420N 5420DMQB 5420FMQB DM5420 DM5420J DM5420W DM7420 J14A N14A
Contextual Info: 5420 DM5420 DM7420 Dual 4-Input NAND Gates General Description Features This device contains two independent gates each of which performs the logic NAND function Y Alternate Military Aerospace device 5420 is available Contact a National Semiconductor Sales Office Distributor for specifications

AN-90

Abstract: C1995 J16A MM54C165 MM54C165J MM54C165N MM74C165 MM74C165J MM74C165N
Contextual Info: MM54C165 MM74C165 Parallel-Load 8-Bit Shift Register General Description Features The MM54C165 MM74C165 functions as an 8-bit parallelload serial shift register Data is loaded into the register independent of the state of the clock s when PARALLEL LOAD (PL) is low Shifting is inhibited as long as PL is low

diode E0A

Abstract: 93L08 93L08DMQB 93L08FMQB C1995 J24A W24C
Contextual Info: 93L08 Dual 4-Bit Latch General Description The 93L08 is a dual 4-bit D-type latch designed for general purpose storage applications in digital systems Each latch contains both an active LOW Master Reset input and active LOW Enable inputs Connection Diagram

DM54L73W

Abstract: C1995 DM54L73 DM54L73J J14A W14B
Contextual Info: DM54L73 Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs General Description This device contains two independent positive pulse triggered J-K flip-flops with complementary outputs The J and K data is processed by the flip-flops after a complete clock

93L28FM

Abstract: 93L28 93L28DMQB 93L28FMQB C1995 J16A W16A F 93L28
Contextual Info: 93L28 Dual 8-Bit Shift Register General Description Features The 93L28 is a high speed serial storage element providing 16 bits of storage in the form of two 8-bit registers The multifunctional capability of this device is provided by several features 1 additional gating is provided at the input to

MM74C74J

Abstract: AN-90 C1995 J14A MM54C74 MM54C74J MM54C74N MM74C74 MM74C74N VCCe10V
Contextual Info: MM54C74 MM74C74 Dual D Flip-Flop General Description The MM54C74 MM74C74 dual D flip-flop is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors Each flipflop has independent data preset clear and clock inputs

National AN-64

Abstract: 54F544LM 54F544SDM 74F544 74F544MSA 74F544SC 74F544SPC N24C 54F544DM 54F544FM
Contextual Info: 54F 74F544 Octal Registered Transceiver General Description Features The ’F544 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of

AM248

Abstract: 54F825FM 54F825LM 54F825SDM 74F825 74F825SC 74F825SPC J24F M24B N24C
Contextual Info: 54F 74F825 8-Bit D-Type Flip-Flop General Description Features The ’F825 is an 8-bit buffered register It has Clock Enable and Clear features which are ideal for parity bus interfacing in high performance microprogramming systems Also included in the ’F825 are multiple enables that allow multiuser control of the interface

9548

Abstract: 54F533DM 54F533FM 54F533LM 74F533 74F533PC 74F533SC 74F533SJ F373
Contextual Info: 54F 74F533 Octal Transparent Latch with TRI-STATE Outputs General Description Features The ’F533 consists of eight latches with TRI-STATE outputs for bus organized system applications The flip-flops appear transparent to the data when Latch Enable LE is HIGH

74F14 national

Abstract: 54F14DM 54F14FM 54F14LM 74F14 74F14PC 74F14SC 74F14SJ J14A M14A
Contextual Info: 54F 74F14 Hex Inverter Schmitt Trigger General Description The ’F14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels They are capable of transforming slowly changing input signals into sharply defined jitter-free output signals In addition they have a greater noise margin than conventional

54F280DM

Abstract: 54F280FM 54F280LM 74F280 74F280PC 74F280SC 74F280SJ F280 J14A N14A
Contextual Info: 54F 74F280 9-Bit Parity Generator Checker General Description Features The ’F280 is a high-speed parity generator checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH If an even number of inputs is HIGH the Sum Even output is HIGH If an odd

INTEL 24 PIN CERAMIC DUAL-IN-LINE PACKAGE

Abstract: 74F545 54F545DM 54F545FM 54F545LM 74F545PC 74F545SC 74F545SJ F545 J20A
Contextual Info: 54F 74F545 Octal Bidirectional Transceiver with TRI-STATE Outputs General Description Features The ’F545 is an 8-bit TRI-STATE high-speed transceiver It provides bidirectional drive for bus-oriented microprocessor and digital communications systems Straight through bidirectional transceivers are featured with 24 mA 20 mA Mil

74F541

Abstract: F540 54F540DM 74F540 74F540PC 74F540SC F240 F244 F541 F54011
Contextual Info: 54F 74F540  54F 74F541 Octal Buffer Line Driver with TRI-STATE Outputs General Description Features The ’F540 and ’F541 are similar in function to the ’F240 and ’F244 respectively except that the inputs and outputs are on opposite sides of the package see Connection Diagrams This pinout arrangement makes these devices especially useful as output ports for microprocessors allowing

KX 001

Abstract: C1995 DS8627 DS8627N DS8628 DS8628N
Contextual Info: DS8627 DS8628 130 225 MHz Low Power Prescalers General Description The DS8627 and DS8628 are low power fixed ratio prescalers which divide by 24 and 20 respectively The inputs can be driven either single or double-ended and they are buffered providing 40 100 mVrms input sensitivity The output

F 9324

Abstract: DM9324 9324DMQB 9324FMQB C1995 DM9324N J16A N16E W16A 9792
Contextual Info: 9324 DM9324 5-Bit Comparator General Description The 9324 expandable comparators provide comparison between two 5-bit words and give three outputs ‘‘less than’’ ‘‘greater than’’ and ‘‘equal to’’ A HIGH on the active LOW Enable Input forces all three outputs LOW

74F158APC

Abstract: 54F158ADM 54F158AFM 54F158ALM 74F158A 74F158ASC 74F158ASJ J16A N16E
Contextual Info: 54F 74F158A Quad 2-Input Multiplexer General Description Features The ’F158A is a high speed quad 2-input multiplexer It selects four bits of data from two sources using the common Select and Enable inputs The four outputs present the selected data in the inverted form The ’F158A can also generate any four of the 16 different functions of two variables