AS7C34096 Search Results

AS7C4096-15JI

Abstract: AS7C34096 AS7C4096 AS7C34096-12TI
Contextual Info: October 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

AS7C34096A

Contextual Info: June 2003 Preliminary Information AS7C34096A 3.3V 512K x 8 CMOS SRAM • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages Features • Pin compatible to AS7C34096

AS7C34096A

Contextual Info: February 2004 AS7C34096A 3.3V 512K x 8 CMOS SRAM • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages Features • Pin compatible to AS7C34096 • Industrial and commercial temperature

Contextual Info: AS7C4096 AS7C34096 A 5V/3.3V 512Kx8 CMOS SRAM Features • Organization: 262,144 words x 16 bits • High speed - 12/15/ 20/ 25 ns address access time - 5/ 5/ 617 ns output enable access time • Law power consumption - .Active: 990 mW max 20 ns cycle, 5V

AS7C4096-20JI

Abstract: AS7C34096-12TI
Contextual Info: January 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins • High speed

AS7C34096

Abstract: AS7C4096 AS7C4096-20JI AS7C34096-12TI
Contextual Info: March 2002 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

AS7C34096A

Contextual Info: March 2004 AS7C34096A 3.3V 512K x 8 CMOS SRAM • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages Features • Pin compatible to AS7C34096 • Industrial and commercial temperature

AS7C4096-12TC

Abstract: AS7C4096-20JI AS7C34096-12TI
Contextual Info: December 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

Contextual Info: September 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

AS7C34096A

Abstract: AS7C34096 AS7C34096A-10JC AS7C34096A-10JI AS7C34096A-12JC AS7C34096A-12JI AS7C34096A-15JC AS7C34096A-15JI AS7C34096A-20JC
Contextual Info: August 2004 AS7C34096A 3.3V 512K x 8 CMOS SRAM • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages Features • Pin compatible to AS7C34096 • Industrial and commercial temperature

AS7C34096A-8TIN

Abstract: AS7C34096A
Contextual Info:  AS7C34096A-8TIN 512K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.3 REVISION HISTORY Revision Description Issue Date Rev. 1.0 Initial Issue July.12. 2012 Rev. 1.1 .“CE# ≧VCC - 0.2V” revised as ”CE# ≦0.2” for TEST CONDITION of Average Operating Power supply Current

Contextual Info: H igh P e r fo r m a n c e •■ AS7C4096 AS7C34096 A 512KX8 H CM O S SRAM 5 I 2 K X 8 C M O S SR A M Features • O rgan ization : 5 2 4 ,2 8 8 w o rd s x 8 bits • 3 6 -p in JEDEC stan dard pack ages • H igh speed - 4 0 0 m il T SO P II - 5 / S / 6 / 7 n s o u tp u t enable access tim e

AS7C34096-25JC

Contextual Info: AS7C4096 AS7C34096 5V/3.3V 512Kx8 CMOS SRAM Features • Organization: 524,288 w ords x 8 bits • High speed - 1 2 /1 5 /2 0 /2 5 ns address access time - 5 / 5 / 6 / 7 ns output enable access time • Low power consumption - Active: 990 m W max 20 ns cycle, 5V

AS7C4096-20JI

Abstract: AS7C34096 AS7C4096 as7c4096-15ji AS7C34096-12TI
Contextual Info: March 2002 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

AS7C34096A

Contextual Info: October 2003 AS7C34096A 3.3V 512K x 8 CMOS SRAM • Equal access and cycle times • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packages Features • Pin compatible to AS7C34096 • Industrial and commercial temperature

Contextual Info: JULY 2000 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY - 110 mW AS7C4096 / max CMOS - 72 mW (AS7C34096) / max CMOS • AS7C4096 (5V version) • AS7C34096 (3.3V version) • Industrial and commercial temperature

4342414

Abstract: AS7C34096 AS7C34096-10JC AS7C34096-10TC AS7C34096-12JC AS7C4096 AS7C4096-12JC AS7C4096-12JI AS7C4096-15JC AS7C4096-20JC
Contextual Info: January 2005 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • Low power consumption: STANDBY • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins

Contextual Info: A Advance information •■ AS7C34096LL 3.3V 512K x8 IntelliwatT low power CMOS SRAM Features • S m allest f o o tp rin t p ack ag e s • O rg a n iz a tio n : 5 2 4 ,2 8 8 w o r d s x 8 b its - 4 8 b all FBGA • In te lliw a tt activ e p o w e r c irc u itry

datasheet CI 556

Abstract: AS7C34096 AS7C4096
Contextual Info: High Performance 512Kx8 CMOS SRAM AS7C4096 AS7C34096 512K×8 CMOS SRAM Preliminary information Features • Organization: 524,288 words × 8 bits • High speed - 12/15/20/25 ns address access time - 6/7/8/9 ns output enable access time • Low power consumption

AS7C34096

Abstract: AS7C4096 AS7C4096-20JI AS7C34096-12TI
Contextual Info: March 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins • High speed

AS7C4096-20JI

Abstract: AS7C34096-12TI
Contextual Info: $SULO#5333# $6:&73<9 $6:&673<9 8926169#845.ð;#&026#65$0 HDWXUHV • Low power consumption: STANDBY - 55 mW AS7C4096) / max CMOS - 36 mW (AS7C34096) / max CMOS • 2.0V data retention • Equal access and cycle times • Easy memory expansion with CE, OE inputs

AS7C34096

Abstract: AS7C34096-10JC AS7C34096-10TC AS7C4096 AS7C4096-20JI AS7C34096-12TI
Contextual Info: July 2001 AS7C4096 AS7C34096 5V/3.3V 512K x 8 CMOS SRAM Features • AS7C4096 5V version • AS7C34096 (3.3V version) • Industrial and commercial temperature • Organization: 524,288 words × 8 bits • Center power and ground pins • High speed

DE MATRIX DE LEDS 7X5

Abstract: matrix 7x5 leds A19N JTAG header 7x2 footprint MT5656SMI MT5600SMI SF56D SC56H 25X2 schematic using 74LVC244A 1.vcc so8 flash rom i2c
Contextual Info: eZ80F92 Development Kit User Manual PRELIMINARY UM013904-0203 ZiLOG Worldwide Headquarters • 532 Race Street • San Jose, CA 95126 Telephone: 408.558.8500 • Fax: 408.558.8300 • www.ZiLOG.com eZ80F92 Development Kit User Manual ii This publication is subject to replacement by a later edition. To determine whether a later

Contextual Info: A Advance information •■ 7C254096LL 2.5V 512K x8 IntelliwatT low power CMOS SRAM Features • • • • • Organization: 524,288 w ords x 8 bits Intelliwatt active pow er circuitry 2.3V to 3.0V operating range 2 5 /3 5 /5 5 /7 0 /1 0 0 ns address access tim e